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Volumn 2006, Issue , 2006, Pages 378-383

Performance and power analysis of globally asynchronous locally synchronous multi-processor systems

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK DOMAINS; GLOBALLY ASYNCHRONOUS LOCALLY SYNCHRONOUS (GALS) MULTI-PROCESSOR SYSTEMS; GLOBALLY SYNCHRONOUS SYSTEMS; VOLTAGE SCALING;

EID: 33749353560     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2006.72     Document Type: Conference Paper
Times cited : (9)

References (15)
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  • 2
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    • May
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  • 3
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    • Power and performance evaluation of globally asynchronous locally synchronous processors
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    • Iyer, A.1
  • 4
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    • E. Talpes and D. Marculescu, "A critical analysis of application-adaptive multiple clock processor," in ISLPED.
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    • Talpes, E.1    Marculescu, D.2
  • 5
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    • Energy-efficient processor design using multiple clock domains with dynamic voltage and frequency scaling
    • G. Semeraro et al., "Energy-efficient processor design using multiple clock domains with dynamic voltage and frequency scaling," in HPCA, 2002, pp. 29-40.
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    • Semeraro, G.1
  • 6
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    • A. Upadhyay et al., "Optimal partitioning of globally asynchronous locally synchronous processor arrays," in GLSVLSI, 2004, pp. 26-28.
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  • 7
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    • S. Naffziger et al., "The implementation of a 2-core multi-threaded Itanium family processor," in ISSCC, 2005.
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    • Naffziger, S.1
  • 8
    • 0036505033 scopus 로고    scopus 로고
    • The raw microprocessor: A computational fabric for software circuits and general purpose programs
    • M. B. Taylor et al., "The raw microprocessor: A computational fabric for software circuits and general purpose programs," IEEE Micro, pp. 25-35, 2002.
    • (2002) IEEE Micro , pp. 25-35
    • Taylor, M.B.1
  • 11
    • 34250863881 scopus 로고    scopus 로고
    • An asynchronous array of simple processors for DSP applications
    • Feb.
    • Z. Yu et al., "An asynchronous array of simple processors for DSP applications," in ISSCC, Feb. 2006.
    • (2006) ISSCC
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  • 12
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    • A full-rate software implementation of an IEEE 802.11a compliant digital baseband transmitter
    • M. Meeuwsen et al., "A full-rate software implementation of an IEEE 802.11a compliant digital baseband transmitter," in SiPS, 2004, pp. 297-301.
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  • 13
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  • 14
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.