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Volumn 3985 LNCS, Issue , 2006, Pages 146-151

A new VLSI architecture of lifting-based DWT

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL METHODS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COSTS; IMAGE COMPRESSION; PROGRAM PROCESSORS;

EID: 33749030678     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11802839_20     Document Type: Conference Paper
Times cited : (11)

References (7)
  • 2
    • 0027612122 scopus 로고
    • VLSI architectures for discrete wavelet transforms
    • K. K. Parhi and T. Nishitani: VLSI architectures for discrete wavelet transforms: IEEE Trans. VLSI Syst., vol. 1 (1993) 191-202
    • (1993) IEEE Trans. VLSI Syst. , vol.1 , pp. 191-202
    • Parhi, K.K.1    Nishitani, T.2
  • 5
    • 0034952674 scopus 로고    scopus 로고
    • A parallel architecture for the 2-D discrete wavelet transform with integer lifting scheme
    • M. Ferretti and D. Rizzo: A parallel architecture for the 2-D discrete wavelet transform with integer lifting scheme: J. VLSI Signal Processing, vol. 28 (2001) 165-185
    • (2001) J. VLSI Signal Processing , vol.28 , pp. 165-185
    • Ferretti, M.1    Rizzo, D.2
  • 6
    • 0036538167 scopus 로고    scopus 로고
    • A VLSI architecture for lifting-based forward and inverse wavelet transform
    • K. Andra, C. Chakrabarti, and T. Acharya: A VLSI architecture for lifting-based forward and inverse wavelet transform: IEEE Trans. on Signal Processing, vol. 50, no. 4 (2002)
    • (2002) IEEE Trans. on Signal Processing , vol.50 , Issue.4
    • Andra, K.1    Chakrabarti, C.2    Acharya, T.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.