10 GBPS over copper lines - State of the art in VLSI

Proceedings - Fifth International Workshop on System-on-Chip for Real-Time Applications, IWSOC 2005

Volumn 2005, Issue , 2005, Pages 491-494

  Bates, Stephen ^a   Iniewski, Kris ^a  

^a UNIVERSITY OF ALBERTA   (Canada)

Author keywords

10GBASE T; 10GBASE X; Data Communications; LDPC

Indexed keywords

EID: 33748888564     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWSOC.2005.1     Document Type: Conference Paper

References (6)

1. The Institute of Electrical and Electronic Engineers, IEEE Std 802.3ab, The IEEE, 1999.
2. http://www.ieee802.org/3/an/
3. G. D. Forney Jr. and W. V. Eyoboglu. Combined Equalizing and Coding using Precoding, IEEE Communications Magazine, Page 25-34, December 2001.
4. C. J. Howland and A. J. Blanksby, A 690-mW 1-Gb/s 1024-b, rate 1/2 Low Density Parity Check Decoder, Solid-State Circuits, IEEE Transactions on, Vol. 37, No. 3, Page. 404-412, 2002.
5. P. Anand and S. Bates, Characterization of Alien-NEXT in 10GBASE-T Systems, IEEE Conference on Electrical and Computer Engineering, May 2005.
6. S. Bates, VLSI Issues for the Implementation of 10GBASE-T Ethernet, 2004 International VLSI Conference on VLSI, Las Vegas, June 2004.