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Volumn , Issue , 2004, Pages 382-386
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VLSI issues for the implementation of 10GBASE-T Ethernet
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Author keywords
10GBASE T; Ethernet; Mixed Signal ASIC
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Indexed keywords
APPROXIMATION THEORY;
CABLES;
NETWORKS (CIRCUITS);
PARAMETER ESTIMATION;
PROBLEM SOLVING;
SIGNAL INTERFERENCE;
SILICON;
SYNCHRONIZATION;
TRANSCEIVERS;
TRANSMITTERS;
10GBASE-T;
ETHERNET;
MAXIMUM PATH LENGTHS;
MIXED-SIGNAL ASIC;
VLSI CIRCUITS;
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EID: 12744260397
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (6)
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References (14)
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