A high-performance platform-based SoC for information security

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 2006, Issue , 2006, Pages 122-123

  Wu, Min ^a   Zeng, Xiaoyang ^a   Han, Jun ^a   Wu, Yongyi ^a   Fan, Yibo ^a  

^a FUDAN UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

EMBEDDED SYSTEMS; INFORMATION ANALYSIS; MICROPROCESSOR CHIPS; PUBLIC KEY CRYPTOGRAPHY; SOFTWARE PROTOTYPING; USER INTERFACES;

CLIENT END APPLICATIONS; FIREBIRD; LOW POWER SCHEMES; SILICON ON CHIP;

SECURITY OF DATA;

EID: 33748606603     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1118299.1118337     Document Type: Conference Paper

References (6)

1. W. Kim, S. Kim, et al., A Platform-Based SoC Design of a 32-Bit Smart Card, ETRI Journal, Vol.25, No.6, Dec. 2003, PP. 510-516.
2. Q. Liu, F. Ma, D. Tong, et al., A regular Parallel RSA Processor, IEEE MWSCAS 2004, July 25-July 28,2004,Japan, PP. III467-III470.
3. J.H Hong, C.W Wu, Cellular array modular multiplier for the RSA Public-key cryptosystem based on modified Booth's algorithm. IEEE Trans. VLSI Systems, Nol.11, No.3, 2002, PP.474-484.
4. M-C. Sun, C-P. Su, et al., Design of a scalable RSA and ECC Crypto-processor, in Proc. ASP-DAC, Kitakyushu, Jan. 2003, PP. 495-498.
5. st Int. Information Security Workshop (ISW 97), Sept. 1997, Japan, PP. 174-187.
6. A. Vandemeulebroecke, et al., A Single-chip 1024-bits RSA processor, in Proc. Advances in Cryptology (EUROCRYPT'89), Belgium, PP.219-236.