A platform-based SoC design of a 32-bit smart card

ETRI Journal

Volumn 25, Issue 6, 2003, Pages 510-516

  Kim, Wonjong ^a   Kim, Seungchul ^a   Bae, Younghwan ^a   Jun, Sungik ^a   Park, Youngsoo ^a   Cho, Hanjin ^a  

^a Electronics and Telecommunications Research Institute (ETRI)   (South Korea)

Author keywords

Low power design; Platform; Smart card; SoC

Indexed keywords

COMPUTER OPERATING SYSTEMS; COMPUTER SIMULATION; CRYPTOGRAPHY; ELECTRIC POWER SUPPLIES TO APPARATUS; INTERFACES (COMPUTER); JAVA PROGRAMMING LANGUAGE; MICROPROCESSOR CHIPS; OPTIMIZATION; PHASE LOCKED LOOPS; ROM; SECURITY OF DATA; SMART CARDS;

CLOCK GATING; FOREIGN LANGUAGE INTERFACE; LOW POWER DESIGN; PLATFORM; SYSTEM ON A CHIP DESING;

INTEGRATED CIRCUIT LAYOUT;

EID: 0347028388     PISSN: 12256463     EISSN: None     Source Type: Journal    
DOI: 10.4218/etrij.03.0103.0026     Document Type: Article

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