A 50-MHz standard CMOS pulse equalizer for hard disk read channels

IEEE Journal of Solid-State Circuits

Volumn 32, Issue 7, 1997, Pages 977-988

  Dehaene, Wim ^b,c   Steyaert, Michiel S J ^a,b   Sansen, Willy ^a,b  

^a IEEE

^b UNIVERSITY OF LEUVEN   (Belgium)

^c Alcatel Mietec ^*  (Belgium)

Author keywords

Equalizer; Hard disk

Indexed keywords

CMOS INTEGRATED CIRCUITS; HARD DISK STORAGE; LOW PASS FILTERS; TUNING;

HARD DISK READ CHANNELS; PULSE EQUALIZER;

EQUALIZERS;

EID: 0031189288     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.597288     Document Type: Article

References (12)

1. Z. Chang, D. Macq et al., "A CMOS analog front-end circuit for an FDM-based ADSL system," IEEE J. Solid-State Circuits, vol. 30, pp. 1449-1456, Dec. 1995.
2. W. Dehaene, "CMOS integrated circuits for analog signal processing in hard disk systems," Ph.D. dissertation, K. U. Leuven, 1996.
3. G. De Veirman and R. Yamasaki, "A 27 MHz programmable bipolar 0, 05° equiripple linear-phase lowpass filter," in ISSCC Dig. Tech. Papers, Feb. 1992, pp. 64-65.
4. C. Laber and P. Gray, "A 20 MHz sixth order BiCMOS parasitic insensitive continuous time filter and second-order equalizer optimized for disk drive read channels," IEEE J. Solid-State Circuits, vol. 28, Apr. 1993.
5. M. Pelgrom, A. Duinmaijer, and A. Welbers, "Matching properties of MOS transistors," IEEE J. Solid-State Circuits, vol. 24, pp. 1433-1439, Oct. 1989.
6. P. Pai, A. Brewster, and A. Abidi, "A 160 MHz front-end IC for EPR-IV PRML magnetic-storage read channels," in ISSCC Dig. Tech. Papers, Feb. 1996, pp. 68-69.
7. C. Petersen, P. Cheung et al., "A 3-5.5 V CMOS 32 Mb/s fullyintegrated read channel for disk-drives," in IEEE Custom Integrated Circuits Conf., 1993, pp. 10.2.1-10.2.4.
8. P. Siegel and J. Wolf, "Modulation and coding for information storage," IEEE Commun. Mag., pp. 68-86, Dec. 1991.
9. J. Silva-Martinez, High Performance CMOS Continuous-Time Filters. Boston, MA: Kluwer, 1992.
10. M. Steyaert, S. Gogaert, W. Dehaene et al., "Full CMOS continuous time filters for GSM applications," Ann. Telecommun., vol. 48, no. 3-4, 1993.
11. G. Tuttle, G. Vishakhadatta et al., "A 130 Mb/s PRML read/write channel with digital servo detection," in ISSCC Dig. Tech. Papers, Feb. 1996, pp. 64-65.
12. M. Zuffada, R. Alini et al., "A single chip 9-32 Mb/s read/write channel for disk-drive applications," IEEE J. Solid-State Circuits, vol. 30, pp. 650-659, June 1995.