Enhanced surface preparation techniques for the si/high-k interface

Solid State Phenomena

Volumn 103-104, Issue , 2005, Pages 11-14

  Barnett, Joel ^a   Young, Chadwin D ^a   Moumen, Naim ^a,b   Bersuker, Gennadi ^a   Peterson, Jeff J ^a   Brown, George A ^a   Lee, Byoung Hun ^a,b   Huff, Howard R ^a  

^a SEMATECH   (United States)

^b IBM   (United States)

Author keywords

Charge trapping; High k; Interfaces

Indexed keywords

EID: 33748109677     PISSN: 10120394     EISSN: 16629779     Source Type: Book Series    
DOI: 10.4028/www.scientific.net/SSP.103-104.11     Document Type: Conference Paper

References (5)

1. SIA, ITRS 2003 edition, www.public.itrs.net, 2003
2. H.R. Huff, et al., Microelectronic Engineering, 69, No. 2-4 (September 2003), pp. 152-167.
3. Gennadi Bersuker, et al., JJAP. 43 (2004), p. 7899-7902.
4. Chadwin D. Young, et al., to be published in Microelectronics Reliability.
5. Gennadi Bersuker, et al., Mat. Res. Soc. Symp Proc. 811 (2004), p. 31-35.