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Volumn 14, Issue 6, 2006, Pages 609-615

Architectural enhancements for network congestion control applications

Author keywords

Congestion control; Hardware acceleration; Network processor; Parallelism

Indexed keywords

HARDWARE ACCELERATION; NETWORK PROCESSOR; PARALLELISM; RANDOM EARLY DETECTION (RED);

EID: 33746925229     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2006.878211     Document Type: Article
Times cited : (6)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.