Low power coarse-grained reconfigurable instruction set processor

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2778, Issue , 2003, Pages 230-239

  Barat, Francisco ^a   Jayapala, Murali ^a   Aa, Tom Vander ^a   Lauwereins, Rudy ^a,c   Deconinck, Geert ^a   Corporaal, Henk ^b  

^a UNIVERSITY OF LEUVEN   (Belgium)

^b EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^c IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POWER UTILIZATION; ENERGY UTILIZATION; PROGRAM PROCESSORS;

COARSE-GRAINED; COARSE-GRAINED RECONFIGURABLE; EMBEDDED MULTIMEDIA; LOW POWER; MULTIMEDIA APPLICATIONS; POWER CONSTRAINTS; POWER MODEL; RISC PROCESSORS;

REDUCED INSTRUCTION SET COMPUTING;

EID: 33746166316     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-45234-8_23     Document Type: Article

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