Hyper-threading technology speeds clusters

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3019, Issue , 2004, Pages 17-26

  Wackowski, Kazimierz ^a   Gepner, Pawel ^b  

^a WARSAW UNIVERSITY OF TECHNOLOGY   (Poland)

^b INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

PROGRAM PROCESSORS;

APPLICATION PERFORMANCE; CLUSTER PERFORMANCE; HYPER-THREADING TECHNOLOGY; IS-ENABLED; NEW APPROACHES;

CLUSTER ANALYSIS;

EID: 33745798259     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-24669-5_3     Document Type: Article

References (22)

1. A. Agarwal, B.-H. Lim, D. Kranz and J. Kubiatowicz: APRIL: A processor Architecture for Multiprocessing. Proc. 17th Ann. Int. Symp. on Computer Archit., May 1990, pg.104-114.
2. R. Alverson et al.: The TERA Computer System. Int. Conf. on Supercomputing, June 1990, pg.1-6.
3. L. A. Barroso et al. Piranha: A Scalable Architecture Based on Single-Chip Multiprocessing. Proc. 27th Ann. Int. Symp. on Computer Archit., June 2000, pg.282-293.
4. P. Doerffer, O Szulc: Usage of Hyper Threading Technology in CFD. Institute of Fluid-Flow Machinery, Polish Academy of Sciences, Gdansk, Poland, August 2003.
5. M. Fillo et al.: The M-Machine Multicomputer. Proc. 28th Ann. Int. Symposium on Microarchitecture, Nov. 1995.
6. L. Hammond, B. Nayfeh, and K. Olukotun. A Single-Chip Multiprocessor. Computer 30(9)(1997) 79-85.
7. G. Hinton et al.: The Microarchitecture of the Intel Pentium 4 Processor. Intel Technology Journal. 1st quarter 2001.
8. G. Hinton and J. Shen: Intel's Multithreading Technology. Microprocessor Forum. October 2001, http://www.intel.com/research/mrl/Library/HintonShen.pdf
9. Intel Corporation. IA-32 Intel Architecture Software Developer's Manual, Vol. 2: Instruction Set Reference. Order number 245471, 2001, http://developer.intel.com/design/Pentium4/manuals
10. Intel Corporation. IA-32 Intel Architecture Software Developer's Manual, Vol. 3: System Programming Guide. Order number 245472, 2001, http://developer.intel.com/design/Pentium4/manuals
11. Intel Corporation. The Intel Vtunet Performance Analyzer, http://developer.intel.com/software/products/vtune
12. Intel Corporation. Intel OpenMP C++/Fortran Compiler for Hyper-Threading Technology: Implementation and Performance, Xinmin Tian et al.
13. Intel Corporation. Using Spin-Loops on Intel Pentium 4 Processor and Intel Xeon Processor MP, Application Note AP-949, http://developer.intel.com/ software/products/itc/sse2/sse2_appnotes.htm
14. D. J. Johnson: HP's Mako Processor. Microprocessor Forum, October 2001, http://www.cpus.hp.com
15. J. A. Redstone, S. J. Eggers and H. M. Levy: An Analysis of Operating System Behavior on a Simultaneous Multithreaded Architecture. Proc. 9th Int. Conf. on Architectural Support for Programming Languages and Operating Systems, Nov. 2000.
16. Standard Performance Evaluation Corporation. SPEC CPU2000 Benchmark, http://www.spec.org/osg/cpu2000
17. B.J. Smith: Architecture and Applications Of the HEP Multiprocessor Computer System. SPIE Real Time Signal Processing IV, 1981, pg. 241-248.
18. A. Snavely and D. M. Tullsen. Symbiotic Job Scheduling for a Simultaneous Multithreading Processor. Proc. 9th Int. Conf. on Architectural Support for Programming Languages and Operating Systems, Nov. 2000.
19. J. M. Tendler, S. Dodson and S. Fields: POWER4 System Microarchitecture. Technical White Paper. IBM Server Group. October 2001.
20. D. Tullsen, S. Eggers, and H. Levy. Simultaneous Multithreading: Maximizing Onchip Parallelism. 22nd Ann. Int. Symp. on Computer Archit., June 1995.
21. D. Tullsen et al.: Exploiting Choice: Instruction Fetch and Issue on Unimplementable Simultaneous Multithreading Processor. 23nd Ann. Int. Symp. on Computer Archit., May 1996.
22. D. Vianney: Hyper-Threading speeds Linux. Linux Kernel Performance Group, Linux Technology Center, IBM, January 2003.