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Volumn 50, Issue 6, 2006, Pages 924-928

A novel tri-control gate surrounding gate transistor (TCG-SGT) nonvolatile memory cell for flash memory

Author keywords

Coupling ratio; Flash memory; Surrounding gate transistor

Indexed keywords

CAPACITANCE; FLASH MEMORY; NONVOLATILE STORAGE; SILICON; SOLID STATE DEVICE STRUCTURES;

EID: 33745757940     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2006.04.023     Document Type: Article
Times cited : (5)

References (10)
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    • A study of high-performance NAND structured EEPROMS
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    • (1992) IEICE Trans Electron , vol.E75-C , Issue.11 , pp. 1351-1357
    • Endoh, T.1    Shirota, R.2    Aritome, S.3    Masuoka, F.4
  • 4
    • 0029406380 scopus 로고
    • Performance of the 3-D PENCIL flash EPROM cell and memory array
    • Pein H., and Plummer J.D. Performance of the 3-D PENCIL flash EPROM cell and memory array. IEEE Trans Electron Dev 42 42 (1995) 1982-1991
    • (1995) IEEE Trans Electron Dev , vol.42 , Issue.42 , pp. 1982-1991
    • Pein, H.1    Plummer, J.D.2
  • 5
    • 0033280448 scopus 로고    scopus 로고
    • Hayashi F, Plummer JD. A self-aligned split-gate flash EEPROM cell with 3-D pillar structure. VLSI Tech Symp, 1999.
  • 6
    • 0033711578 scopus 로고    scopus 로고
    • Hioki M, Endoh T, Sakuraba H, Lenski M, Masuoka F. An analysis of program and erase operation for FC-SGT flash memory cells. In: Proceedings of the international conference on simulation of semiconductor processes and devices (SISPAD), Seattle, USA, 6-8 September 2000. p. 116-7.
  • 7
    • 5444263285 scopus 로고    scopus 로고
    • An analysis of program and erase mechanisms for floating channel type surrounding gate transistor flash memory cells
    • Hioki M., Sakuraba H., Endoh T., and Masuoka F. An analysis of program and erase mechanisms for floating channel type surrounding gate transistor flash memory cells. IEICE Trans Electron E87-C 9 (2004) 1628-1635
    • (2004) IEICE Trans Electron , vol.E87-C , Issue.9 , pp. 1628-1635
    • Hioki, M.1    Sakuraba, H.2    Endoh, T.3    Masuoka, F.4
  • 8
    • 0028481403 scopus 로고
    • A high capacitive coupling ratio (HiCR) cell for single 3 V power supply flash memories
    • Kanamori K., Hisamune Y., Kubota T., Suzuki Y., Tsukiji M., Hasegawa E., et al. A high capacitive coupling ratio (HiCR) cell for single 3 V power supply flash memories. IEICE Trans Electron E77-C 8 (1994) 1296-1302
    • (1994) IEICE Trans Electron , vol.E77-C , Issue.8 , pp. 1296-1302
    • Kanamori, K.1    Hisamune, Y.2    Kubota, T.3    Suzuki, Y.4    Tsukiji, M.5    Hasegawa, E.6
  • 9
    • 0016939689 scopus 로고
    • Electrically alterable avalanche-injection-type MOS READ-ONLY memory with stacked-gate structure
    • Iizuka H., Masuoka F., Sato T., and Ishikawa M. Electrically alterable avalanche-injection-type MOS READ-ONLY memory with stacked-gate structure. IEEE Trans Electron Dev 23 4 (1976) 379-387
    • (1976) IEEE Trans Electron Dev , vol.23 , Issue.4 , pp. 379-387
    • Iizuka, H.1    Masuoka, F.2    Sato, T.3    Ishikawa, M.4
  • 10
    • 33745752007 scopus 로고    scopus 로고
    • Silvaco Int. Process Simulator ATHENA ver. 5.7.24.c.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.