Analysis of program and erase operation for FC-SGT Flash memory cells

International Conference on Simulation of Semiconductor Processes and Devices, SISPAD

Volumn , Issue , 2000, Pages 116-118

  Hioki, Masakazu ^a   Endoh, Tetsuo ^a   Sakuraba, Hiroshi ^a   Lenski, Markus ^a   Masuoka, Fujio ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; DATA STORAGE EQUIPMENT; DIGITAL ARITHMETIC; INTEGRATED CIRCUIT LAYOUT;

FLASH MEMORY CELLS; FLOATING CHANNEL TYPE SURROUNDING GATE TRANSISTORS (FC-SGT);

BIPOLAR TRANSISTORS;

EID: 0033711578     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (4)