High-speed FPGA implementation of secure hash algorithm for IPSec and VPN applications

Journal of Supercomputing

Volumn 37, Issue 2, 2006, Pages 179-195

  Kakarountas, Athanasios P ^a   Michail, Haralambos ^a   Milidonis, Athanasios ^a   Goutis, Costas E ^a   Theodoridis, George ^b  

^a UNIVERSITY OF PATRAS   (Greece)

^b ARISTOTLE UNIVERSITY OF THESSALONIKI   (Greece)

Author keywords

FPGA; Hardware implementation; Hash function; High speed performance; Security

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; CRYPTOGRAPHY; ELECTRONIC COMMUNITIES; INDUSTRIAL APPLICATIONS; INTERNET; SECURITY OF DATA;

HARDWARE IMPLEMENTATION; HASH FUNCTION; HIGH-SPEED PERFORMANCE; INTERNET PROTOCOL SECURITY (IPSEC); SECURITY; VIRTUAL PRIVATE NETWORK (VPN);

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 33745712693     PISSN: 09208542     EISSN: 15730484     Source Type: Journal    
DOI: 10.1007/s11227-006-5682-5     Document Type: Article

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