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Volumn 2005, Issue , 2005, Pages 277-284

A stress-life methodology for ball grid array lead-free and tin-lead solder interconnects under impact conditions

Author keywords

[No Author keywords available]

Indexed keywords

DATA ACQUISITION; ELECTRIC POWER SYSTEM INTERCONNECTION; ELECTRONIC EQUIPMENT; FINITE ELEMENT METHOD; LEAD; LIQUID CRYSTAL DISPLAYS; PRINTED CIRCUIT BOARDS; SCANNING ELECTRON MICROSCOPY; SOLDERING; STRESS ANALYSIS;

EID: 33745712153     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESIME.2005.1502814     Document Type: Conference Paper
Times cited : (3)

References (19)
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    • Suhir, E., 1996, "Dynamic Response of a One-Degree-of-Freedom Linear System to a Shock Load During a Drop Test: Effects of Viscous Damping," IEEE Transactions on Components, Packaging, and Manufacturing Technology - Part A, 19, pp. 435-440.
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    • Suhir, E.1
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    • (1992) ASME Journal of Electronic Packaging , vol.114 , pp. 368-377
    • Suhir, E.1
  • 7
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    • Suhir, E., 1997, "Is the Maximum Acceleration an Adequate Criterion of the Dynamic Strength of a Structural Element in an Electronic Product?" IEEE Transactions on Components, Packaging, and Manufacturing Technology - Part A, 20, pp. 513-517.
    • (1997) IEEE Transactions on Components, Packaging, and Manufacturing Technology - Part A , vol.20 , pp. 513-517
    • Suhir, E.1
  • 10
    • 0031329604 scopus 로고    scopus 로고
    • Shock protection of portable electronic products: Shock response spectrum, damage boundary approach and beyond
    • Goyal, S., Papadopoulos, J. M., and Sullivan, P. A., 1997, "Shock Protection of Portable Electronic Products: Shock Response Spectrum, Damage Boundary Approach and Beyond," Shock and Vibration, 4-3, pp. 169-191.
    • (1997) Shock and Vibration , vol.4 , Issue.3 , pp. 169-191
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  • 11
    • 0035388620 scopus 로고    scopus 로고
    • Drop-simulation of electronic boards mounted with CSPs
    • Hirata, I., Yoshida, Y., and Morizaki, I., 2001, "Drop-Simulation of Electronic Boards Mounted with CSPs," NEC Res. & Develop., 42-3.
    • (2001) NEC Res. & Develop , vol.42 , Issue.3
    • Hirata, I.1    Yoshida, Y.2    Morizaki, I.3
  • 14
    • 0038690051 scopus 로고    scopus 로고
    • Board level drop test and Simulation of TFBGA Packages for Telecommunication Applications
    • Tee, T. Y., Ng, H. C., Lim, C. T., Pek, E., 2003, "Board level drop test and Simulation of TFBGA Packages for Telecommunication Applications," Proceedings ECTC, pp. 121-129.
    • (2003) Proceedings ECTC , pp. 121-129
    • Tee, T.Y.1    Ng, H.C.2    Lim, C.T.3    Pek, E.4
  • 15
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    • Singapore
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.