Multi-layer overlay metrology

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 6152 I, Issue , 2006, Pages

  Ausschnitt, C P ^a   Morningstar, J ^a   Muth, W ^a   Schneider, J ^a   Yerdon, R J ^a   Binns, L A ^b   Smith, N P ^c  

^a IBM MICROELECTRONICS   (United States)

^b Accent Optical Technologies UK Ltd   (United Kingdom)

^c Accent Optical Technologies   (Taiwan)

Author keywords

Alignment; Lithography; Overlay metrology; Semiconductor manufacturing

Indexed keywords

ALIGNMENTS; CHIP FABRICATION; OVERLAY METROLOGY; SEMICONDUCTOR MANUFACTURING;

ACOUSTIC NOISE; ARRAYS; CONTROL SYSTEMS; ERROR CORRECTION; IMAGE COMPRESSION; ROBUSTNESS (CONTROL SYSTEMS); VISUALIZATION;

MICROPROCESSOR CHIPS;

EID: 33745628309     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.657397     Document Type: Conference Paper

References (6)

1. C.P. Ausschnitt, J. Morillo, R. J. Yerdon, "Combined layer-to-layer and within layer overlay control," SPIE Proc. 4689, Feb 2002.
2. R. Leidy, et. al., IBM US Patent 6,350,548: "Nested overlay measurement target"
3. M. Adel, et. al., "Characterization of Overlay Mark Fidelity," SPIE Proc. 5038, 2003, pp.437-444.
4. H.T. Huang, et. al., "Scatterometry-based overlay metrology," SPIE Proc. 5038, 2003, pp.126-137.
5. C.P. Ausschnitt, L.A. Binns, J. Morillo, N.P. Smith, IBM patent application, "Multi-layer Alignment and Overlay Target and Measurement Method," filed Nov. 2005.
6. L. A. Binns, N. P. Smith, C. P. Ausschnitt, J. Morningstar, W. Muth, J. Schneider, R. J. Yerdon, "Layout Optimization for Multilayer Overlay Targets," SPIE Proc. 6155-14, Feb 2006.