Study of critical dimension and overlay measurement methodology using SEM image analysis for process control

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 6152 II, Issue , 2006, Pages

  Lee, Tae Yong ^a   Lee, Byoung Ho ^a   Chin, Soo Bok ^a   Cho, Young Sun ^a   Hong, Jun Sik ^a   Hong, Jong Seo ^a   Song, Chang Lyong ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

CD SEM; Overlay; Pattern alignment

Indexed keywords

ERROR ANALYSIS; IMAGE ANALYSIS; LITHOGRAPHY; OPTICAL RESOLVING POWER; SCANNING ELECTRON MICROSCOPY; SEMICONDUCTOR MATERIALS;

CD-SEM; OVERLAY; PATTERN ALIGNMENT;

PROCESS CONTROL;

EID: 33745612945     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.656736     Document Type: Conference Paper

References (2)

1. Eric Solecky and Jaime D. Morillo, "Simultaneous Critical Dimension and Overlay Measurements on a SEM Through Target Design for Inline Manufacturing Lithography Control", Proceedings of SPIE Vol. 5375, pp. 41-50, 2004
2. John C. Robinson, Mark Stakely, Jorge M. Poplawski, Pavel Izikson, Elyakim Kassel & Mike E. Adel, "A Comparison of Methods for in-chip Overlay Control at the 65nm node", Proceedings of SPIE Vol. 5375, pp. 384- 394, 2004