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Volumn 5375, Issue PART 1, 2004, Pages 384-394
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A comparison of methods for in-chip overlay control at the 65 nm node
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Author keywords
In chip; Metrology; Overlay; Pattern placement error; Process control
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Indexed keywords
BOX IN BOX TYPE (BIB);
IN-CHIP PATTERN PLACEMENT ERROR;
OVERLAY MARK FIDELITY (OMF);
ACOUSTIC NOISE;
DATA REDUCTION;
ERROR ANALYSIS;
IMAGE ANALYSIS;
LITHOGRAPHY;
PATTERN RECOGNITION;
PROCESS CONTROL;
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EID: 4344691664
PISSN: 0277786X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1117/12.534510 Document Type: Conference Paper |
Times cited : (1)
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References (3)
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