Routers with a single stage of buffering

Computer Communication Review

Volumn 32, Issue 4, 2002, Pages 251-264

  Iyer, Sundar ^a   Zhang, Rui ^a   McKeown, Nick ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

Buffers; Constraint Sets; Routers; Switching

Indexed keywords

BUFFERS; COMBINED INPUT AND OUTPUT QUEUING (CIOQ); CONSTRAINT SETS; MEMORY BANDWIDTH; SHARED MEMORY ROUTERS; SINGLE-BUFFERED (SB);

BUFFER STORAGE; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; CONSTRAINT THEORY; DISTRIBUTED COMPUTER SYSTEMS; ENERGY UTILIZATION; INPUT OUTPUT PROGRAMS; MATHEMATICAL MODELS; QUEUEING NETWORKS; STORAGE ALLOCATION (COMPUTER); SWITCHING;

ROUTERS;

EID: 33744929849     PISSN: 01464833     EISSN: 01464833     Source Type: Conference Proceeding    
DOI: 10.1145/964725.633050     Document Type: Conference Paper

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