메뉴 건너뛰기




Volumn 53, Issue 5, 2006, Pages 344-348

A Novel Noise-Shaping DAC for Multi-Bit Sigma-Delta Modulator

Author keywords

Digital analog conversion (DAC); mixed analog digital integrated circuits; noise; sigma delta ( ) modulation

Indexed keywords

ALGORITHMS; DELTA SIGMA MODULATION; MODULATORS; SIGNAL NOISE MEASUREMENT; SIGNAL TO NOISE RATIO; SPURIOUS SIGNAL NOISE;

EID: 33646863878     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2006.869920     Document Type: Article
Times cited : (12)

References (11)
  • 1
    • 0003573558 scopus 로고    scopus 로고
    • Delta-Sigma Data Converters—Theory, Design, and Simulation
    • Eds., Piscataway, NJ: IEEE Press
    • S. R. Norsworthy, R. Schreier, and G. C. Temes, Eds., Delta-Sigma Data Converters—Theory, Design, and Simulation. Piscataway, NJ: IEEE Press, 1996.
    • (1996)
    • Norsworthy, S.R.1    Schreier, R.2    Temes, G.C.3
  • 2
    • 0029697457 scopus 로고    scopus 로고
    • An analysis of dynamic element matching techniques in sigma-delta modulation
    • May
    • O. J. A. P. Nys and R. K. Henderson, “An analysis of dynamic element matching techniques in sigma-delta modulation,” in Proc. IEEE IS CAS'96, May 1996, pp. 231–234.
    • (1996) Proc. IEEE IS CAS'96 , pp. 231-234
    • Nys, O.J.A.P.1    Henderson, R.K.2
  • 3
    • 0029532111 scopus 로고
    • Linearity enhancement of multibit ΣΔ A/D and D/A converters using data weighted averaging
    • Dec.
    • R. T. Baird and T. S. Fiez, “Linearity enhancement of multibit ΣΔ A/D and D/A converters using data weighted averaging,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 42, no. 12, pp. 753–762, Dec. 1995.
    • (1995) IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process. , vol.42 , Issue.12 , pp. 753-762
    • Baird, R.T.1    Fiez, T.S.2
  • 4
    • 0034479805 scopus 로고    scopus 로고
    • A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8 x oversampling ratio
    • Dec.
    • T. S. Fujimori et al., “A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8 x oversampling ratio,” IEEE J. Solid-State Circuits, vol. 35, no. 12, pp. 1820–1828, Dec. 2000.
    • (2000) IEEE J. Solid-State Circuits , vol.35 , Issue.12 , pp. 1820-1828
    • Fujimori, T.S.1
  • 5
    • 0035693267 scopus 로고    scopus 로고
    • A 2.5-V sigma-delta modulator for broad-band communication applications
    • Dec.
    • K. Vleugels, S. Rabii, and B. A. Wooley, “A 2.5-V sigma-delta modulator for broad-band communication applications,” IEEE J. Solid-State Circuits, vol. 36, no. 12, pp. 1887–1899, Dec. 2001.
    • (2001) IEEE J. Solid-State Circuits , vol.36 , Issue.12 , pp. 1887-1899
    • Vleugels, K.1    Rabii, S.2    Wooley, B.A.3
  • 6
    • 0037345959 scopus 로고    scopus 로고
    • A multibit sigma-delta ADC for multimode receivers
    • Mar.
    • M. R. Miller and C. S. Petrie, “A multibit sigma-delta ADC for multimode receivers,” IEEE J. Solid-State Circuits, vol. 38, no. 3, pp. 475–482, Mar. 2003.
    • (2003) IEEE J. Solid-State Circuits , vol.38 , Issue.3 , pp. 475-482
    • Miller, M.R.1    Petrie, C.S.2
  • 7
    • 0034251567 scopus 로고    scopus 로고
    • A 14-bit current-mode ΣΔ DAC based upon rotated data weighted averaging
    • Aug.
    • R. E. Radke, A. Eshraghi, and T. S. Fiez, “A 14-bit current-mode ΣΔ DAC based upon rotated data weighted averaging,” IEEE J. Solid-State Circuits, vol. 35, pp. 1074–1084, Aug. 2000.
    • (2000) IEEE J. Solid-State Circuits , vol.35 , pp. 1074-1084
    • Radke, R.E.1    Eshraghi, A.2    Fiez, T.S.3
  • 8
    • 0036177049 scopus 로고    scopus 로고
    • A wide-band CMOS sigma delta modulator with incremental data weighted averaging
    • Jan.
    • T.-H. Kuo, K.-D. Chen, and H.-R. Yeng, “A wide-band CMOS sigma delta modulator with incremental data weighted averaging,” IEEE J. Solid-State Circuits, vol. 37, pp. 11–17, Jan. 2002.
    • (2002) IEEE J. Solid-State Circuits , vol.37 , pp. 11-17
    • Kuo, T.-H.1    Chen, K.-D.2    Yeng, H.-R.3
  • 9
    • 4344717865 scopus 로고    scopus 로고
    • A 16-bit, 5-MHz multi-bit sigma-delta ADC using adaptively randomized DWA
    • Sep.
    • Y.-I. Park et al., “A 16-bit, 5-MHz multi-bit sigma-delta ADC using adaptively randomized DWA,” in Proc. IEEE Custom Integrated Ciruits. Conf., Sep. 2003, pp. 7-2-1-7-2-4.
    • (2003) Proc. IEEE Custom Integrated Ciruits. Conf. , pp. 7-2-1-7-2-4
    • Park, Y.-I.1
  • 10
    • 0034314862 scopus 로고    scopus 로고
    • Techniques for preventing tonal behavior of data weighted averaging algorithm in ΣΔ modulators
    • Nov.
    • M. Vadipour, “Techniques for preventing tonal behavior of data weighted averaging algorithm in ΣΔ modulators,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 47, no. 11, pp. 1137–1144, Nov. 2000.
    • (2000) IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process. , vol.47 , Issue.11 , pp. 1137-1144
    • Vadipour, M.1
  • 11
    • 4644302408 scopus 로고    scopus 로고
    • High-order multibit modulators and pseudodata-weighted-averaging in low-oversampling ΣΔ ADCs for broad-band applications
    • Jan.
    • A. A. Hamoui and K. W. Martin, “High-order multibit modulators and pseudodata-weighted-averaging in low-oversampling ΣΔ ADCs for broad-band applications,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 1, pp. 72–85, Jan. 2004.
    • (2004) IEEE Trans. Circuits Syst. I, Reg. Papers , vol.51 , Issue.1 , pp. 72-85
    • Hamoui, A.A.1    Martin, K.W.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.