FPGA programmable logic block evaluation using quantified Boolean satisfiability

IEE Proceedings: Computers and Digital Techniques

Volumn 153, Issue 3, 2006, Pages 165-172

  Ling, A C ^a   Singh, D P ^b   Brown, S D ^b  

^a UNIVERSITY OF TORONTO   (Canada)

^b Altera Toronto Technology Center   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN ALGEBRA; FORMAL LOGIC; FUNCTION EVALUATION; LOGIC PROGRAMMING; PROBLEM SOLVING;

BOOLEAN SATISFIABILITY; FPGA PROGRAMMABLE LOGIC BLOCK; LOGIC FUNCTIONS; PROGRAMMABLE CIRCUITS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 33646425839     PISSN: 13502387     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cdt:20050164     Document Type: Article

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