InP double-hetero bipolar transistor technology for 130 GHz clock speed

Physica Status Solidi C: Conferences

Volumn 3, Issue 3, 2006, Pages 452-455

  Weimann, Nils G ^a   Houtsma, V ^a   Yang, Y ^a   Frackoviak, J ^a   Tate, A ^a   Chen, J ^a   Weiner, J ^a   Lee, J ^a   Baeyens, Y ^a   Chen, Y K ^a  

^a NOKIA RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; DRY ETCHING; INDIUM COMPOUNDS; MILLIMETER WAVE DEVICES; NETWORKS (CIRCUITS); POWER ELECTRONICS; AUTOMOBILE MANUFACTURE; CLOCKS; OPTIMIZATION; OSCILLISTORS;

DIVIDER CIRCUITS; INDIUM PHOSPHIDE-BASED HETERO BIPOLAR TRANSISTORS (HBT); MIXED-MODE APPLICATIONS; PLANAR FABRICATION TECHNOLOGY;

HETEROJUNCTION BIPOLAR TRANSISTORS; TECHNOLOGY;

BASE-COLLECTOR CAPACITANCE; CLOCK SPEED; DIVIDER CIRCUITS; EPITAXIAL STRUCTURE; MIXED MODE; PLANAR FABRICATION; POWER OUT PUT; TEST VEHICLE;

EID: 33646175300     PISSN: 16101634     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1002/pssc.200564169     Document Type: Conference Paper

References (3)

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