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Volumn 17, Issue 2, 2006, Pages 116-132

Reconfigurable hardware implementation of a phase-correlation stereoalgorithm

Author keywords

Field Programmable Gate Arrays (FPGAs); Frame rate implementation; Phase correlation; Reconfigurable hardware implementation; Stereo disparity estimation

Indexed keywords

ALGORITHMS; COMPUTATION THEORY; COMPUTER SOFTWARE; COMPUTER VISION; FIELD PROGRAMMABLE GATE ARRAYS; VISION;

EID: 33645696090     PISSN: 09328092     EISSN: 14321769     Source Type: Journal    
DOI: 10.1007/s00138-006-0018-2     Document Type: Article
Times cited : (38)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.