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Volumn , Issue , 2001, Pages 612-619

Integrated hardware-software co-synthesis and high-level synthesis for design of embedded systems under power and latency constraints

Author keywords

[No Author keywords available]

Indexed keywords

HARDWARE RESOURCES; HARDWARE-SOFTWARE CO-SYNTHESIS; HIGH LEVEL SYNTHESIS; INTEGRATED APPROACH; INTEGRATED METHOD; LATENCY CONSTRAINTS; PERFORMANCE MODEL; POWER ESTIMATIONS;

EID: 33645151702     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2001.915087     Document Type: Conference Paper
Times cited : (6)

References (18)
  • 1
    • 84893559443 scopus 로고    scopus 로고
    • MILP based task mapping for heterogeneous multiprocessor systems
    • A. Bender et al, "MILP Based Task Mapping for Heterogeneous Multiprocessor Systems", Proc. of EDAC, 1996, pp. 283-288.
    • (1996) Proc. of EDAC , pp. 283-288
    • Bender, A.1
  • 2
    • 0033358774 scopus 로고    scopus 로고
    • System-level power optimization: Techniques and tools
    • L. Benini et al, "System-Level Power Optimization: Techniques and Tools", Proc. of ISPLED, 1999, pp. 283-288.
    • (1999) Proc. of ISPLED , pp. 283-288
    • Benini, L.1
  • 3
    • 84893685759 scopus 로고
    • High-throughput and Low-power DSP using clocked CMOS Circuitry
    • M. Borah et al, "High-throughput and Low-power DSP using clocked CMOS Circuitry", Proc. of ISPLED, 1995.
    • (1995) Proc. of ISPLED
    • Borah, M.1
  • 4
    • 0030645179 scopus 로고    scopus 로고
    • COSYN: Hardware-software co-synthesis of embedded systems
    • B. Dave et al, "COSYN: Hardware-Software Co-Synthesis of Embedded Systems", Proc. of DAC, 1997, pp. 703-708.
    • (1997) Proc. of DAC , pp. 703-708
    • Dave, B.1
  • 5
    • 0032097872 scopus 로고    scopus 로고
    • Power estimation for embedded systems: A hardware/software codesign approach
    • June
    • W. Fornaciari et al, "Power Estimation for Embedded Systems: A Hardware/Software Codesign Approach", IEEE Trans. on VLSI, June 1998.
    • (1998) IEEE Trans. on VLSI
    • Fornaciari, W.1
  • 7
    • 0034289926 scopus 로고    scopus 로고
    • Scheduling with bus access optimization for distributed embedded systems
    • November
    • P. Eles et al, "Scheduling with Bus Access Optimization for Distributed Embedded Systems", IEEE Trans. on VLSI, November, 2000.
    • (2000) IEEE Trans. on VLSI
    • Eles, P.1
  • 8
    • 0001858873 scopus 로고
    • Hardware-software cosynthesis for digital systems
    • September
    • R. Gupta et al, "Hardware-Software Cosynthesis for Digital Systems", IEEE Design & Test of Computers, September 1992, pp. 29-40.
    • (1992) IEEE Design & Test of Computers , pp. 29-40
    • Gupta, R.1
  • 9
    • 0033364875 scopus 로고    scopus 로고
    • Power macro-models for DSP blocks with applications to high-level synthesis
    • S. Gupta et al, "Power Macro-Models for DSP Blocks with Applications to High-Level Synthesis", Proc. of ISPLED, 1999, pp. 103-105.
    • (1999) Proc. of ISPLED , pp. 103-105
    • Gupta, S.1
  • 10
    • 0032650587 scopus 로고    scopus 로고
    • A low power hardware/software partitioning approach for core-based embedded systems
    • J. Henkel, "A Low Power Hardware/Software Partitioning Approach for Core-based Embedded Systems", Proc. of DAC, 1999, pp. 122-127.
    • (1999) Proc. of DAC , pp. 122-127
    • Henkel, J.1
  • 11
    • 84893685625 scopus 로고    scopus 로고
    • High-level power estimation
    • P. Landman, "High-Level Power Estimation", Proc. of IS-PLED, 1996.
    • (1996) Proc. of IS-PLED
    • Landman, P.1
  • 12
    • 5544256331 scopus 로고    scopus 로고
    • Power Minimization in IC Design: Principles and Applications
    • M. Pedram, "Power Minimization in IC Design: Principles and Applications", ACM Trans, on DAES, Vol. 1, No. 1, 1996, pp. 3-56.
    • (1996) ACM Trans, on DAES , vol.1 , Issue.1 , pp. 3-56
    • Pedram, M.1
  • 14
    • 0032688679 scopus 로고    scopus 로고
    • PowerConscious fixed priority schedulingfor hard real-time systems
    • Y. Shin et al, "PowerConscious Fixed Priority Schedulingfor Hard Real-Time Systems", Proc. of DAC, 1999, pp. 134-139.
    • (1999) Proc. of DAC , pp. 134-139
    • Shin, Y.1
  • 15
    • 84893806240 scopus 로고    scopus 로고
    • Hardware software partitioning with integrated hardware design space exploration
    • V. Srinivasan et al, "Hardware Software Partitioning with Integrated Hardware Design Space Exploration", Proc. of DATE, 1998, pp. 28-35.
    • (1998) Proc. of DATE , pp. 28-35
    • Srinivasan, V.1
  • 16
    • 84893686893 scopus 로고    scopus 로고
    • Scheduling hardware/software systems using symbolic techniques
    • K. Strehl et al, "Scheduling Hardware/Software Systems Using Symbolic Techniques", Proc. of CODES/CACHE, 1999.
    • (1999) Proc. of CODES/CACHE
    • Strehl, K.1
  • 17
    • 0028722375 scopus 로고
    • Power analysis of embedded software: A first step towards software power minimization
    • December
    • V. Tiwari et al, "Power Analysis of Embedded Software: A First Step Towards Software Power Minimization", IEEE Trans. on VLSI, Vol. 2, No. 4, December 1994, pp. 437-445.
    • (1994) IEEE Trans. on VLSI , vol.2 , Issue.4 , pp. 437-445
    • Tiwari, V.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.