SCOPUS 정보 검색 플랫폼

Volumn , Issue , 2006, Pages 151-156

Optimization of Cu interconnect layers for CMOS image sensor technology

(10) Gambino, J a Adkisson, J a Hoague, T a Jaffe, M a Leidy, R a Rassel, R J a Kyan, J b McGrath, D b Sackett, D b Stancampiano, C b

a IBM (United States)

b EASTMAN KODAK COMPANY (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANGULAR RESPONSE; CMOS IMAGE SENSOR; DIELECTRIC STACK; CAPPING LAYERS; CMOS IMAGER SENSOR TECHNOLOGY; COPPER WIRING;

CMOS INTEGRATED CIRCUITS; COPPER; DIELECTRIC DEVICES; IMAGE SENSORS; OPTIMIZATION; PASSIVATION; PHOTODIODES; DIELECTRIC PROPERTIES; ELECTRIC WIRE; OPTICAL INTERCONNECTS; SILICON NITRIDE;

ELECTRIC POWER SYSTEM INTERCONNECTION; COPPER;

EID: 33644950278 PISSN: 15401766 EISSN: None Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper

Times cited : (5)

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