A broadband and scalable model for on-chip inductors incorporating substrate and conductor loss effects

IEEE Transactions on Electron Devices

Volumn 53, Issue 3, 2006, Pages 413-421

  Guo, Jyh Chyurn ^a   Tan, Teng Yang ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Broadband; Inductor; Lossy substrate; Scalable

Indexed keywords

CURVE FITTING; ELECTRIC COILS; ELECTRIC CONDUCTORS; ELECTRIC LOSSES; ELECTRIC NETWORK ANALYSIS; EQUIVALENT CIRCUITS; MATHEMATICAL MODELS; OPTIMIZATION; SUBSTRATES;

CONDUCTOR LOSS; EQUIVALENT CIRCUIT ANALYSIS; ON-CHIP INDUCTORS; OPTIMIZATION DESIGN; SUBSTRATE LOSS;

ELECTRIC INDUCTORS;

EID: 33244473058     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.864409     Document Type: Article

References (11)

1. C. P. Yue and S. S. Wong, "Physical modeling of spiral inductors on silicon," IEEE Trans. Electron Devices, vol. 47, no. 4, pp. 560-568, Apr. 2000.
2. M. Park, S. Lee, C. S. Kim, H. K. Yu, and K. S. Nam, "The detailed analysis of high Q CMOS-compatible microwave spiral inductors in silicon technology," IEEE Trans. Electron Devices, vol. 45, no. 10, pp. 1953-1959, Oct. 1998.
3. P. Arcioni, R. Castello, G. D. Astis, E. Sacchi, and F. S. Svelto, "Measurement and modeling of Si integrated inductors," IEEE Trans. Instrum. Meas., vol. 47, no. 11, pp. 1372-1378, Nov. 1998.
4. Y. Cao, R. A. Grove, X. Huang, N. D. Zamdmer, J.-O. Plouchart, R. A. Wachnik, T.-J. King, and C. Hu, "Frequency-independent equivalent-circuit model for on-chip spiral inductors," IEEE J. Solid-State Circuits, vol. 38, no. 5, pp. 419-426, May 2003.
5. M. Fujishima and J. Kino, "Accurate subcircuit model of an on-chip inductor with a new substrate network," in VLSI Symp. Tech. Dig., 2004, pp. 376-379.
6. J. Gil and H. Shin, "A simple wide-band on-chip inductor model for silicon-based RF Ics," IEEE Trans. Microw. Theory Techn., vol. 51, no. 12, pp. 2023-2028, Dec. 2003.
7. T. S. Horng, J. K. Jau, C. H. Huang, and F. Y. Han, "Synthesis of a super broadband model for on-chip spiral inductors," in IEEE RFIC Symp. Dig., 2004, pp. 453-456.
8. A. M. Niknejad and R. G. Meyer, "Analysis of eddy-current losses over conductive substrate with applications to monolithic inductors and transformers," IEEE Trans. Microw. Theory Techn., vol. 49, no. 1, pp. 166-176, Jan. 2001.
9. A. Sutono, D. Heo, Y.-J. E. Chen, and J. Laskar, "High-Q LTCC-based passive library for wireless system-on-package (SOP) module development," IEEE Trans. Microw. Theory Techn., vol. 49, no. 10, pp. 1715-1724, Oct. 2001.
10. A. Sutono, D. Heo, E. Chen, K. Lim, and J. Laskar, "Compact implementation of component library in LTCC technology and its application to CMOS RF power amplifier design," in Proc. IEEE Conf. Electr. Perf. Electron. Packag., Oct. 23-25, 2000, pp. 288-291.
11. T. Kamgaing, T. Myers, M. Petras, and M. Miller, "Modeling of frequency dependent losses in two-port and three-port inductors on silicon," in IEEE MTT-S Int. Microw. Symp. Dig., 2002, pp. 153-156.