Automated source-level error localization in hardware designs

IEEE Design and Test of Computers

Volumn 23, Issue 1, 2006, Pages 8-19

  Peischl, Bernhard ^a   Wotawa, Franz ^a  

^a GRAZ UNIVERSITY OF TECHNOLOGY   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TESTING; COMPUTER DEBUGGING; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER TESTING; DESIGN FOR TESTABILITY; ERROR DETECTION; PROGRAM DEBUGGING; SEMANTICS;

AUTOMATED SOURCE-LEVEL DEBUGGING; DEBUGGING MODEL; FAULT DETECTION; HARDWARE DESIGNS;

COMPUTER HARDWARE;

EID: 32144455874     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2006.5     Document Type: Article

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