Adaptive execution techniques for SMT multiprocessor architectures

Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP

Volumn , Issue , 2005, Pages 236-246

  Jung, Changhee ^a   Lim, Daeseob ^b   Lee, Jaejin ^c   Han, Sang Yong ^c  

^a Electronics and Telecommunications Research Institute (ETRI)   (South Korea)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c Seoul National University   (South Korea)

Author keywords

Adaptive execution; Compilers; Performance counters; Performance estimation; Simultaneous multi threading

Indexed keywords

ADAPTIVE EXECUTION; PERFORMANCE COUNTERS; SIMULTANEOUS MULTI-THREADING;

COMPUTER ARCHITECTURE; FEEDBACK; FORMAL LOGIC; PERFORMANCE;

MULTIPROCESSING SYSTEMS;

EID: 31844448889     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1065944.1065976     Document Type: Conference Paper

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