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Volumn 48, Issue 10-11 SPEC. ISS., 2004, Pages 1733-1739

Application of heat flow models to SOI current mirrors

Author keywords

Characteristic thermal length; Current mirror; Interconnect; MOSFET; Silicon on insulator

Indexed keywords

COMPUTER SIMULATION; ENERGY DISSIPATION; HEAT CONDUCTION; MATHEMATICAL MODELS; MOSFET DEVICES; SUBSTRATES; TEMPERATURE DISTRIBUTION;

EID: 3142717010     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2004.05.007     Document Type: Conference Paper
Times cited : (7)

References (12)
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    • (1998) IEEE Trans. Comp., Packag., Manuf., Technol. , vol.21 , Issue.3 , pp. 406-411
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  • 6
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    • Effect of microscale thermal conduction on the packing limit of silicon-on-insulator electronic devices
    • Goodson K.E., Filk M.I. Effect of microscale thermal conduction on the packing limit of silicon-on-insulator electronic devices. IEEE Trans. Comp. Hybrids Manuf. Technol. 15(5):1992;715-722.
    • (1992) IEEE Trans. Comp. Hybrids Manuf. Technol. , vol.15 , Issue.5 , pp. 715-722
    • Goodson, K.E.1    Filk, M.I.2
  • 7
    • 3142782369 scopus 로고    scopus 로고
    • http://www-device.eecs.berkeley.edu/~bsimsoi.
  • 8
    • 0344898414 scopus 로고    scopus 로고
    • Analytical heat flow modeling of silicon-on-insulator devices
    • Cheng M.-C., Yu F., Habitz P., Ahmadi G. Analytical heat flow modeling of silicon-on-insulator devices. Solid State Electron. 48:2004;415-426.
    • (2004) Solid State Electron , vol.48 , pp. 415-426
    • Cheng, M.-C.1    Yu, F.2    Habitz, P.3    Ahmadi, G.4
  • 9
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    • Measurement of buried oxide thermal conductivity for accurate electrothermal simulation of SOI devices
    • Tenbroek B.M., Bunyan R.J.T., Whiting G., et al. Measurement of buried oxide thermal conductivity for accurate electrothermal simulation of SOI devices. IEEE Electron Dev. 46(1):1999;251-253.
    • (1999) IEEE Electron Dev. , vol.46 , Issue.1 , pp. 251-253
    • Tenbroek, B.M.1    Bunyan, R.J.T.2    Whiting, G.3
  • 10
    • 0033904917 scopus 로고    scopus 로고
    • Interconnect thermal modeling for accurate simulation of circuit timing and reliability
    • Chen D., Li E., Rosenbaum E., Kang S.M. Interconnect thermal modeling for accurate simulation of circuit timing and reliability. IEEE Trans. CAD ICs Syst. 19:2000;197-205.
    • (2000) IEEE Trans. CAD ICs Syst. , vol.19 , pp. 197-205
    • Chen, D.1    Li, E.2    Rosenbaum, E.3    Kang, S.M.4
  • 11
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  • 12
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    • Raphael Reference Manual, Avant! Corporation, June 2002.
    • (2002) Raphael Reference Manual


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.