TESH: A new hierarchical interconnection network for massively parallel computing

IEICE Transactions on Information and Systems

Volumn E80-D, Issue 9, 1997, Pages 837-845

  Jain, Vijay K ^a   Ghirmal, Tadasse ^b   Horiguchi, Susumu ^a  

^a UNIVERSITY OF SOUTH FLORIDA   (United States)

^b JAPAN ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY   (Japan)

Author keywords

3 d computer; Hierarchical networks; Interconnection networks; Parallel computing; Stacked silicon planes; Tori connected meshes (tesh); Ultra large scale integration (ulsl); Very large scale integration (vlsi)

Indexed keywords

COMPUTER NETWORKS; COMPUTER SYSTEMS; DESIGN; IMAGE PROCESSING; LARGE SCALE SYSTEMS; PARALLEL PROCESSING SYSTEMS; ULSI CIRCUITS; VLSI CIRCUITS;

HIERARCHICAL NETWORKS; STACKED SILICON PLANES; TORI CONNECTED MESHES;

INTERCONNECTION NETWORKS;

EID: 0031219881     PISSN: 09168532     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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