A Σ-Δ fractional-N frequency synthesizer using a wide-band integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications

IEEE Journal of Solid-State Circuits

Volumn 39, Issue 7, 2004, Pages 1164-1169

  Lee, Han Il ^a   Cho, Je Kwang ^b   Lee, Kun Seok ^b   Hwang, In Chul ^b   Ahn, Tae Won ^c   Nah, Kyung Suc ^b   Park, Byeong Ha ^b  

^a Purdue University   (United States)

^b SAMSUNG Electronics   (South Korea)

^c Dongyang University   (South Korea)

Author keywords

Adaptive frequency calibration (AFC); Frequency synthesizer; General packet radio service (GPRS); GSM; Phase locked loop (PLL); Sigma delta modulator; Voltage controlled oscillator (VCO); WCDMA

Indexed keywords

BROADBAND NETWORKS; CMOS INTEGRATED CIRCUITS; CODE DIVISION MULTIPLE ACCESS; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; GROUND PENETRATING RADAR SYSTEMS; SWITCHING NETWORKS; VARIABLE FREQUENCY OSCILLATORS;

ADAPTIVE FREQUENCY CALIBRATION (AFC); PHASE LOCKED LOOP (PLL); SIGMA-DELTA MODULATOR; WCDMA;

FREQUENCY SYNTHESIZERS;

EID: 3042822147     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.829938     Document Type: Conference Paper

References (13)

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