Compact and efficient encryption/decryption module for FPGA implementation of the AES Rijndael very well suited for small embedded applications

International Conference on Information Technology: Coding Computing, ITCC

Volumn 2, Issue , 2004, Pages 583-587

  Rouvroy, Gaël ^a   Standaert, François Xavier ^a   Quisquater, Jean Jacques ^a   Legat, Jean Didier ^a  

^a UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

Author keywords

AES; Compact encryption decryption implementation; Cryptography; DES; FPGA

Indexed keywords

ADVANCED ENCRYPTION STANDARD (AES); AES; COMPACT ENCRYPTION/DECRYPTION IMPLEMENTATION; DATA ENCRYPTION STANDARD (DES); DES;

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; CONSTRAINT THEORY; FIELD PROGRAMMABLE GATE ARRAYS; LOGIC DESIGN; SECURITY OF DATA;

CRYPTOGRAPHY;

EID: 3042688575     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ITCC.2004.1286716     Document Type: Conference Paper

References (8)

1. Xilinx. The Spartan-3 and Virtex-II field programmable gate arrays data sheets.available from http://www.xilinx.com.
2. National Bureau of Standards. FIPS PUB 46, The Data Encryption Standard. U.S. Departement of Commerce, Jan 1977.
3. J. Daemon and V. Rijmen. The Block Cipher RIJNDAEL, NIST's AES home page, available from http://www.nist.gov/aes.
4. P.Baretto, V.Rijmen, The KHAZAD Legacy-Level Block Cipher, Submission to NESSIE project, available from http://www.cosic.esat.kuleuven.ac.be/nessie/
5. G. Rouvroy, FX. Standaert, JJ. Quisquater, JD. Legat. Design Strategies and Modified Descriptions to Optimize Cipher FPGA Implementations: Fast and Compact Results for DES and TripleDES. In the proceedings of FPL 2003, Lecture Notes in Computer Science, vol 2778, pp. 181-193, Springer-Verlag.
6. FX. Standaert, G. Rouvoy, JJ. Quisquater, JD. Legat. A Methodology to Implement Block Ciphers in Reconfigurable Hardware and its Application to Fast and Compact AES Rijndael. In the proceedings of FPGA 2003, pp. 216-224, ACM.
7. FX. Standaert, G. Rouvoy, JJ. Quisquater, JD. Legat. Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs. In the proceedings of CHES 2003, Lecture Notes in Computer Science, vol 2779, pp. 334-350, Springer-Verlag.
8. K. Gaj and P. Chodowiec. Very Compact FPGA Implementation of the AES Algorithm. In the proceedings of CHES 2003, Lecture Notes in Computer Science, vol 2779, pp. 319-333, Springer-Verlag.