Beyond nanoscale DRAM and flash - Challenges and opportunities for research in emerging memory devices

IEEE Workshop on Microelectronics and Electron Devices, WMED: IEEE Electron Devices Northwest Regional Meeting

Volumn , Issue , 2004, Pages 35-38

  Tran, Luan C ^a  

^a MICRON TECHNOLOGY INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS; DYNAMIC RANDOM ACCESS STORAGE; GATES (TRANSISTOR); LEAKAGE CURRENTS; MOS CAPACITORS; PERSONAL COMPUTERS; PROM; SEMICONDUCTOR JUNCTIONS; SILICA; WIRELESS TELECOMMUNICATION SYSTEMS;

CAPACITOR ELECTRODES; FLOATING GATES (FG); NONVOLATILE MEMORIES; STORAGE NODES;

DATA STORAGE EQUIPMENT;

EID: 3042653740     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)

1. R. H. Dennard, "Field-Effect Transistor Memory," U.S. Patent 3,387,286, 1968.
2. D. Kahng and S.M Sze, "A floating-gate and its application to memory devices," The Bell System Technical Journal, vol. 46, no. 4, 1967, pp. 1288-1295.
3. D. Frohman-Bentchkowsky, "A fully-decoded 2048-bit Electrically Programmable MOS-ROM," ISSCC, 1971.
4. F. Masuoka et al., "New ultra high density EPROM and Flash EEPROM cell with NAND structure cell," IEDM 1987, pp. 552-555.
5. S. Lai, "Current status of phase change memory and its future," IEDM Tech. Digest, 2003. pp. 255-258.
6. H. Horii et al., "A Novel Cell Technology Using N-Doped GeSbTe Film for Phase Change RAM," VLSI Symp. 2003.
7. W. Cho et al., "A 0.18um 3V 64Mb Non-Volatile Phase Transition RAM," ISSCC Tech. Digest, 2004.
8. K. Likharev, "Layered tunnel barriers for nonvolatile memory devices, Applied Physics Letter, vol. 73, pp. 2137-2139, 1998.
9. A. Korotkov and K. Likharev, "Resonant FN Tunneling through layered tunnel barriers and its possible application," pp. 223-226, Tech. Digest IEDM 1999.
10. S. Tiwari et al., "Volatile and Non-volatile memories in silicon with nano-srystal storage," IEDM Tech. Digest 1995, pp. 521-524
11. J. J. Lee et al., « Theoretical and Experimental Investigation of Si Nanocrystal Memory Device with HfO2 high-k Tunneling Dielectric, VLSI Technology Symp., 2003.
12. V. Zhirnov, SRC, ITRS-ERD Memory Working Group, private communication, 2003.
13. Emerging Research Devices, ITRS 2003.