Exposing memory access regularities using object-relative memory profiling

International Symposium on Code Generation and Optimization, CGO

Volumn , Issue , 2004, Pages 315-323

  Wu, Qiang ^a   Raman, Easwaran ^a   Pyatakov, Artem ^a   Clark, Douglas W ^a   Spiridonov, Alexey ^a   Auaust, David I ^a  

^a Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA LAYOUT; GUIDE MEMORY; MEMORY ACCESS; MEMORY PROFILING;

FEEDBACK; HIGH LEVEL LANGUAGES; INFORMATION ANALYSIS; INTEGER PROGRAMMING; OPTIMIZATION; PROGRAM COMPILERS;

STORAGE ALLOCATION (COMPUTER);

EID: 3042613725     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

1. M. D. Smith, "Overcoming the challenges to feedback-directed optimization," in Proceedings of the ACM SIGPLAN Workshop on Dynamic and Adaptive Compilation and Optimization (Dynamo '00), January 2000.
2. Y. Wu, "Efficient discovery of regular stride patterns in irregular programs and its use in compiler prefetching," in Proceedings of the ACM SIGPLAN 2002 Conference on Programming Language Design and Implementation, June
3. W. Y. Chen, S. A. Mahlke, N. J. Warter, R. E. Hank, R. A. Bringmann, S. Anik, D. M. Lavery, J. C. Gyllenhaal, T. Kiyohara, and W. W. Hwu, "Using profile information to assist advanced compiler optimization and scheduling," in Proceedings of the Fifth Workshop on Languages and Compilers for Parallel Computing, August 1992.
4. S. Rubin, R. Bodik, and T. Chilimbi, "An efficient profile-analysis framework for data-layout optimizations," in Proceedings of the 29th ACM Symposium on Principles of Programming Languages, January 2002.
5. E. M. Nystrom, R. D. Ju, and W. W. Hwu, "Characterization of repeating data access patterns in integer benchmarks," in Proceedings of the 28th International Symposium on Computer Architecture, September 2001.
6. D. A. Connors, "Memory profiling for directing data speculative optimizations and scheduling," Master's thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana, IL, 1997.
7. C.G.Neyill-Manning and I.H.Written, "Identifying hierarchical structure in sequences: A linear-time algorithm," Journal of Artif. Intell. Research, pp. 67-82, July 1997.
8. C. Dulong, R. Krishnaiyer, D. Kulkarni, D. Lavery, W. Li, J. Ng, and D. Sehr, "An overview of the Intel IA-64 compiler," Intel Technology Journal Q4,1999, pp. 1-15, June 1999.
9. Y. Paek and J. Hoeflinger, "Efficient and precise array access analysis," ACM Transactions on Programming Languages and Systems, vol. 24, no. 1, pp. 65-109, 2000.
10. T. Chilimbi, "Efficient representations and abstractions for quantifying and exploiting data reference locality," in Proceedings of the ACM SIGPLAN 01 Conference on Programming Language Design and Implementation, June 2001.
11. T. Chilimbi and M. Hirzel, "Dynamic hot data stream prefetching for general-purpose programs," in Proceedings of the ACM SIGPLAN02 Conference on Programming Language Design and Implementation, June 2002.
12. J. Hoeflinger and Y. Paek, "A comparative analysis of dependence testing mechanisms," in Proceedings of LCPC2000, 13th International Workshop on Languages and Compiler for Parallel Computing, August 2000.
13. B. Calder, K. Chandra, S. John, and T. Austin, "Cache-conscious data placement," in Proceedings of the 8th International Symposium on Architectural Support for Programming Languages and Operating Systems ASPLOS'98, October 1998.
14. T. Sherwood, S. Sair, and B. Calder, "Phase tracking and prediction," in Proceedings of the 30th International Symposium on Computer Architecture, pp. 336-349, June 2003.