Software timing analysis using HW/SW cosimulation and instruction set simulator

Hardware/Software Codesign - Proceedings of the International Workshop

Volumn , Issue , 1998, Pages 65-69

  Liu, Jie ^a   Lajolo, Marcello ^a   Sangiovanni Vincentelli, Alberto ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DATA COMMUNICATION SYSTEMS; MULTIPROCESSING SYSTEMS; NETWORK PROTOCOLS; REAL TIME SYSTEMS; SUBROUTINES; TIME DOMAIN ANALYSIS;

INSTRUCTION SET SIMULATORS (ISS); INTERPROCESS COMMUNICATION ARCHITECTURE; PTOLEMY SIMULATION;

COMPUTER ARCHITECTURE;

EID: 0031705913     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/278241.278299     Document Type: Conference Paper

References (12)