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Volumn , Issue , 2004, Pages 39-50

Compiler optimization of memory-resident value communication between speculative threads

Author keywords

[No Author keywords available]

Indexed keywords

DATA DEPENDENCE; MEMORY-RESIDENT VALUES; SCALAR VALUE COMMUNICATION; THREAD-LEVEL SPECULATION (TLS);

EID: 3042567406     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (37)

References (32)
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    • CINTRA, M., AND TORRELLAS, J. Eliminating squashes through learning cross-thread violations in speculative parallelization for multiprocessors. In Proceedings of the 8th HPCA (Feb 2002).
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  • 9
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    • Cytron, R.1
  • 11
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    • Speculative versioning cache
    • Computer Sciences Department, University of Wisconsin-Madison, July
    • GOPAL, S., VIJAYKUMAR, T. N., SMITH, J. E., AND SOHI, G. S. Speculative Versioning Cache. Tech. Rep. 1334, Computer Sciences Department, University of Wisconsin-Madison, July 1997.
    • (1997) Tech. Rep. , vol.1334
    • Gopal, S.1    Vijaykumar, T.N.2    Smith, J.E.3    Sohi, G.S.4
  • 12
    • 78149251595 scopus 로고    scopus 로고
    • Techniques for speculative run-time parallelization of loops
    • November
    • GUPTA, M., AND NIM, R. Techniques for Speculative Run-Time Parallelization of Loops. In Supercomputing '98 (November 1998).
    • (1998) Supercomputing '98
    • Gupta, M.1    Nim, R.2
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    • Value prediction for speculative multithreaded architectures
    • Haifa, Israel, Nov.
    • MARCUELLO, P., TUBELLA, J., AND GONZALEZ, A. Value prediction for speculative multithreaded architectures. In Proceedings of Micro-32 (Haifa, Israel, Nov. 1999).
    • (1999) Proceedings of Micro-32
    • Marcuello, P.1    Tubella, J.2    Gonzalez, A.3
  • 20
    • 0033076827 scopus 로고    scopus 로고
    • The LRPD test: Speculative run-time parallelization of loops with privatization and reduction parallelization
    • RAUCHWERGER, L., AND PADUA, D. A. The LRPD test: Speculative run-time parallelization of loops with privatization and reduction parallelization. IEEE Transactions on Parallel and Distributed System 10, 2 (1999), 160-172.
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    • Rauchwerger, L.1    Padua, D.A.2
  • 22
    • 84888331734 scopus 로고    scopus 로고
    • STANDARD PERFORMANCE EVALUATION CORPORATION. The SPEC Benchmark Suite. http://www.specbench.org.
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  • 23
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    • Architectural support for thread-level data speculation
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    • STEFFAN, J. G., COLOHAN, C. B., AND MOWRY, T. C. Architectural Support for Thread-Level Data Speculation. Tech. Rep. CMU-CS-97-188, School of Computer Science, Carnegie Mellon University, November 1997.
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  • 31
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.