Mathematically describing the target contour in silicon such that model-based OPC can best realize design intent

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5379, Issue , 2004, Pages 214-223

  Cork, Christopher ^a   Balasingam, Pratheep ^b   Sandvik, Sonya ^b   Kielhorn, Bill ^b   Rieger, Mike ^b  

^a Synopsys SARL   (France)

^b SYNOPSYS INC   (United States)

Author keywords

Corner rounding; Design for Manufacturing; Design intent; Interpretation filter; OPC

Indexed keywords

CORNER ROUNDING; DESIGN FOR MANUFACTURING; DESIGN INTENT; INTERPRETATION FILTER; OPC;

COMPUTER SOFTWARE; COSTS; MASKS; OPTICAL PROPERTIES; PRINTED CIRCUITS; WAVE FILTERS;

SILICON WAFERS;

EID: 2942694130     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.538047     Document Type: Conference Paper

References (4)

1. Michael L. Rieger, and John P. Stirniman, "Proximity Correction System for Wafer Lithography", U.S. Patent 6,081,658, issued June 27, 2000.
2. Jeff Mayhew, Mike Rieger, Jiangwei Li, Lin Zhang, Zongwu Tang, Jim Shiely "Verifying RET Mask Layouts." Proc. SPIE Vol. 4692, p. 336-344. 2002
3. Daniel Beale, Jim Shiely, Mike Rieger "Multiple-stage optical proximity correction" Proc. SPIE Vol. 5040, p. 1202-1209, Optical Microlithography XVI. 2003
4. Lawrence S. Melvin III, James P. Shiely, Michael L. Rieger, Benjamin Painter "Line-End Correction Feature Performance as a Function of Reticle Cost". Proc. SPIE Vol. 5040, p. 441-449, Optical Microlithography XVI.2003