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Volumn , Issue , 2004, Pages 401-406

Automated test generation and test point selection for specification test of analog circuits

Author keywords

Automated test generation; Parametric failure; Specification testing; Test point selection

Indexed keywords

ALGORITHMS; AUTOMATION; COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; REGRESSION ANALYSIS; SEMICONDUCTOR DEVICE MANUFACTURE; SPECIFICATIONS; WAVEFORM ANALYSIS;

EID: 2942637947     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2004.1283707     Document Type: Conference Paper
Times cited : (13)

References (16)
  • 3
    • 0031353809 scopus 로고    scopus 로고
    • A perturbation based fault modeling and simulation for mixed signal circuits
    • N. Hamida, K Saab, D. Marche and B. Kaminska, "A Perturbation Based Fault Modeling and Simulation for Mixed Signal Circuits", Proc. Asian Test Symp., 1997, pp. 182-187.
    • (1997) Proc. Asian Test Symp. , pp. 182-187
    • Hamida, N.1    Saab, K.2    Marche, D.3    Kaminska, B.4
  • 4
    • 0031337488 scopus 로고    scopus 로고
    • Fault macromodeling for analog/mixed-signal circuits
    • C. Y. Pan and K. T. Cheng, "Fault Macromodeling for Analog/Mixed-Signal Circuits", Proc. Int'l Test Conf., 1997, pp. 913-922.
    • (1997) Proc. Int'l Test Conf. , pp. 913-922
    • Pan, C.Y.1    Cheng, K.T.2
  • 5
    • 0002621116 scopus 로고
    • An integrated approach for analog circuit testing with a minimum number of detected parametrs
    • M. Slamani, B. Kaminska, and G. Quensel, "An integrated approach for analog circuit testing with a minimum number of detected parametrs", Proc. Intl. Test. Conf., 1994, pp. 631-640.
    • (1994) Proc. Intl. Test. Conf. , pp. 631-640
    • Slamani, M.1    Kaminska, B.2    Quensel, G.3
  • 8
    • 0032684763 scopus 로고    scopus 로고
    • A test point insertion algorithm for mixed-signal circuits
    • J. Zhang, S. Huynh and M. Soma, "A test point insertion algorithm for mixed-signal circuits", Proc.VLSI Test Symp., 1999, pp. 319-324.
    • (1999) Proc.VLSI Test Symp. , pp. 319-324
    • Zhang, J.1    Huynh, S.2    Soma, M.3
  • 11
    • 0032308030 scopus 로고    scopus 로고
    • Enhancing test effectiveness for analog circuits using synthesized measurements
    • P.N. Variyam and A. Chatterjee, "Enhancing test effectiveness for analog circuits using synthesized measurements", Proc. VLSI Test Symp., 1998, pp. 132-137.
    • (1998) Proc. VLSI Test Symp. , pp. 132-137
    • Variyam, P.N.1    Chatterjee, A.2
  • 12
    • 0033733147 scopus 로고    scopus 로고
    • Test generation for accurate prediction of analog specifications
    • R. Voorakaranam and A. Chatterjee, "Test generation for accurate prediction of analog specifications", Proc. VLSI Test Symp., 2000, pp. 137-142.
    • (2000) Proc. VLSI Test Symp. , pp. 137-142
    • Voorakaranam, R.1    Chatterjee, A.2
  • 13
    • 0002432565 scopus 로고
    • Multivariate adaptive regression splines
    • J. H. Friedman, "Multivariate Adaptive Regression Splines", The Annals of Statistics, vol. 19, no. 1, 1991, pp. 1-141.
    • (1991) The Annals of Statistics , vol.19 , Issue.1 , pp. 1-141
    • Friedman, J.H.1
  • 15
    • 0028734143 scopus 로고
    • Multifrequency testability analysis for analog circuits
    • M. Slamani and B. Kaminska, "Multifrequency Testability Analysis for analog circuits", Proc. VLSI Test Symp., 1994, pp. 54-59.
    • (1994) Proc. VLSI Test Symp. , pp. 54-59
    • Slamani, M.1    Kaminska, B.2
  • 16
    • 0142215980 scopus 로고    scopus 로고
    • Automatic multitone alternate test generation for RF circuits using behavioral models
    • A. Halder, S. Bhattacharya and A. Chatterjee, "Automatic Multitone Alternate Test Generation for RF Circuits using Behavioral Models," Proc. Int'l Test Conf, 2003, pp. 665-673.
    • (2003) Proc. Int'l Test Conf. , pp. 665-673
    • Halder, A.1    Bhattacharya, S.2    Chatterjee, A.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.