-
2
-
-
0012983387
-
Special session on low-power systems-on-chips
-
C. Piguet, M. Renaudin and T. J.-F. Omnes, Special session on low-power systems-on-chips, Proc. Design, Automation and Test Conf. (2001), pp. 488-494.
-
(2001)
Proc. Design, Automation and Test Conf.
, pp. 488-494
-
-
Piguet, C.1
Renaudin, M.2
Omnes, T.J.-F.3
-
3
-
-
0012790108
-
-
Prentice Hall, Upper Saddle River, USA
-
K. S. Yeo, S. S. Rofail and W. L. Goh, CMOS/BiCMOS ULSI: Low-Voltage Low-Power (Prentice Hall, Upper Saddle River, USA, 2002).
-
(2002)
CMOS/BiCMOS ULSI: Low-voltage Low-power
-
-
Yeo, K.S.1
Rofail, S.S.2
Goh, W.L.3
-
7
-
-
0030285348
-
A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor
-
J. Montanaro, R. T. Witek, K. Anne, A. J. Black, E. M. Cooper, D. W. Dobberpuhl, P. M. Donahue, J. Eno, W. Hoeppner, D. Kruckemyer, T. H. Lee, P. C. M. Lin, L. Madden, D. Murray, M. H. Pearce, S. Santhanam, K. J. Snyder, R. Stehpany and S. C. Thierauf, A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor, IEEE J. Solid-State Circuits 31 (1996) 1703-1714.
-
(1996)
IEEE J. Solid-state Circuits
, vol.31
, pp. 1703-1714
-
-
Montanaro, J.1
Witek, R.T.2
Anne, K.3
Black, A.J.4
Cooper, E.M.5
Dobberpuhl, D.W.6
Donahue, P.M.7
Eno, J.8
Hoeppner, W.9
Kruckemyer, D.10
Lee, T.H.11
Lin, P.C.M.12
Madden, L.13
Murray, D.14
Pearce, M.H.15
Santhanam, S.16
Snyder, K.J.17
Stehpany, R.18
Thierauf, S.C.19
-
8
-
-
0033300560
-
Customization of a CISC processor core for low-power applications
-
Y.-S. Chang, B.-I. Park, I.-C. Park and C.-M. Kyung, Customization of a CISC processor core for low-power applications, IEEE Int. Conf. Computer Design (1999), pp. 152-157.
-
(1999)
IEEE Int. Conf. Computer Design
, pp. 152-157
-
-
Chang, Y.-S.1
Park, B.-I.2
Park, I.-C.3
Kyung, C.-M.4
-
9
-
-
0032713339
-
A low power 256 KB SRAM design
-
B. Bhaumik, P. Pradhan, G. S. Visweswaran, R. Varambally and A. Hardi, A low power 256 KB SRAM design, Proc. Int. Conf. VLSI Design (1999), pp. 67-70.
-
(1999)
Proc. Int. Conf. VLSI Design
, pp. 67-70
-
-
Bhaumik, B.1
Pradhan, P.2
Visweswaran, G.S.3
Varambally, R.4
Hardi, A.5
-
10
-
-
0035722615
-
A fast low power embedded cache memory design
-
X.-M. Zhao, Y.-Z. Ye, M.-Y. Yu and X.-M. Li, A fast low power embedded cache memory design, Proc. Int. Conf. ASIC (2001), pp. 566-569.
-
(2001)
Proc. Int. Conf. ASIC
, pp. 566-569
-
-
Zhao, X.-M.1
Ye, Y.-Z.2
Yu, M.-Y.3
Li, X.-M.4
-
13
-
-
0029305190
-
A bipolar load CMOS SRAM cell for embedded applications
-
A. S. Shubat, R. Kazerounian, R. Irani, A. Roy, G. A. Rezvani, B. Eitan and C. Y. Yang, A bipolar load CMOS SRAM cell for embedded applications, IEEE Electron. Dev. Lett. 16 (1995) 169-171.
-
(1995)
IEEE Electron. Dev. Lett.
, vol.16
, pp. 169-171
-
-
Shubat, A.S.1
Kazerounian, R.2
Irani, R.3
Roy, A.4
Rezvani, G.A.5
Eitan, B.6
Yang, C.Y.7
-
14
-
-
0026141225
-
Current mode techniques for high-speed VLSI circuits with application to current sense amplifier for CMOS SRAM's
-
E. Seevinck, P. J. V. Beers and H. Ontrop, Current mode techniques for high-speed VLSI circuits with application to current sense amplifier for CMOS SRAM's, IEEE J. Solid-State Circuits 26 (1991) 525-536.
-
(1991)
IEEE J. Solid-state Circuits
, vol.26
, pp. 525-536
-
-
Seevinck, E.1
Beers, P.J.V.2
Ontrop, H.3
-
15
-
-
0026852658
-
High-speed hybrid current-mode sense amplifier for CMOS SRAMs
-
P. Y. Chee, P. C. Liu and L. Siek, High-speed hybrid current-mode sense amplifier for CMOS SRAMs, Electron. Lett. 28 (1992) 871-873.
-
(1992)
Electron. Lett.
, vol.28
, pp. 871-873
-
-
Chee, P.Y.1
Liu, P.C.2
Siek, L.3
-
16
-
-
0032050212
-
New current conveyor for high-speed low-power current sensing
-
K. S. Yeo, New current conveyor for high-speed low-power current sensing, IEE Proc. Circuits Dev. Syst. 145 (1998) 85-89.
-
(1998)
IEE Proc. Circuits Dev. Syst.
, vol.145
, pp. 85-89
-
-
Yeo, K.S.1
-
17
-
-
0036823209
-
High-performance low-power current sense amplifier using a cross-coupled current-mirror configuration
-
K. S. Yeo, W. L. Goh, Z. H. Kong, Q. X. Zhang and W. G. Yeo, High-performance low-power current sense amplifier using a cross-coupled current-mirror configuration, IEE Proc. Circuits Dev. Syst. 149 (2002) 308-314.
-
(2002)
IEE Proc. Circuits Dev. Syst.
, vol.149
, pp. 308-314
-
-
Yeo, K.S.1
Goh, W.L.2
Kong, Z.H.3
Zhang, Q.X.4
Yeo, W.G.5
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