1.1 to 1.6GHz distributed differential oscillator global clock network

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 48, Issue , 2005, Pages 518-519

  Chan, Steven C ^a   Shepard, Kenneth L ^a   Restle, Phillip J ^b  

^a Columbia University ^*  (United States)

^b IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 28144432585     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. S. C. Chan et al., "A 4.6GHz Resonant Global Clock Distribution Network," ISSCC Dig. Tech. Papers, pp. 342-343, Feb., 2004.
2. F. O'Mahony et al., "10GHz Clock Distribution Using Coupled Standing-Wave Oscillators," ISSCC Dig. Tech. Papers, pp. 428-429, Feb., 2003.
3. J. Wood et al., "Multi-GigaHertz Low-Power Low-Skew Rotary Clock Scheme," ISSCC Dig. Tech. Papers, pp. 400-401, Feb., 2001.
4. F. E. Anderson et al., "The Core Clock System on the Next Generation Itanium Microprocessor," ISSCC Dig. Tech. Papers, pp. 146-147, Feb., 2002.
5. J. G. Maneatis, "Low-Jitter Process-Independent DLL and PLL Based on Self-Bias Techniques," IEEE J. Solid-State Circuits, vol. 31, no. 11, pp. 1723-1732, Nov., 1996.