SCOPUS 정보 검색 플랫폼

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 4, Issue , 2001, Pages 538-541

A low power asynchronous des

(4) Siu, Pui Lam a Choy, Chiu Sing a Butas, J a Chan, C F a

a CHINESE UNIVERSITY OF HONG KONG (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS CIRCUIT DESIGN; ASYNCHRONOUS DATA; CMOS TECHNOLOGY; CONTACTLESS SMART CARD; CRYPTOGRAPHIC APPLICATIONS; DATA ENCRYPTION; LOW-POWER CONSUMPTION; SMART-CARD CHIPS;

CMOS INTEGRATED CIRCUITS; CRYPTOGRAPHY; INTEGRATED CIRCUIT MANUFACTURE; SMART CARDS;

ASYNCHRONOUS SEQUENTIAL LOGIC;

EID: 27844455981 PISSN: None EISSN: None Source Type: Conference Proceeding
DOI: 10.1109/ISCAS.2001.922293 Document Type: Conference Paper

Times cited : (6)

References (8)

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2
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3
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- Schneier, B.¹

4
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- Thesis of the electronic department. Fudan University. February
- Wing Kwai. The contactless smart card design. Thesis of the electronic department. Fudan University. February. 2000.
- (2000) The Contactless Smart Card Design
- Kwai, W.¹

5
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- IEEE Computer Society Press, april. IEEE Computer Society Press
- Joep Kessels (Philips Research). Torsten Kramer (MAZ Hamburg). Gerrit den Besten, Ad Peeters (Philips Research). Volker Timm (Philips Semiconductors). Applying Asynchronous Circuits in Contactless Smart card. Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems. IEEE Computer Society Press, april. 36-44. IEEE Computer Society Press
- Applying Asynchronous Circuits in Contactless Smart Card. Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems , pp. 36-44
- Kessels, J.¹ Kramer, T.² Den Besten, G.³ Peeters, A.⁴ Timm, V.⁵

6
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- Asynchronous logic in bit-serial arithmetic
- September
- J. Povazanec. C.S. Choy. C.F. Chan, "Asynchronous logic in bit-serial arithmetic". Proeedings of IEEE International Conference on Electronics, Circuits and Systems, Vol. 3. September 1998. pp. 175178.
- (1998) Proeedings of IEEE International Conference on Electronics, Circuits and Systems , vol.3 , pp. 175-178
- Povazanec, J.¹ Choy, C.S.² Chan, C.F.³

7
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- An useful micropipeline architecture to implement DSP algorithms
- August
- C.S. Choy. T.C. Pang. J. Povazanec and C.F. Chan. "An useful micropipeline architecture to implement DSP algorithms". Proceedings of the 24th Euromicro Conference. Vol. 1. August 1998, pp. 212-215
- (1998) Proceedings of the 24th Euromicro Conference , vol.1 , pp. 212-215
- Choy, C.S.¹ Pang, T.C.² Povazanec, J.³ Chan, C.F.⁴

8
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- An ALU design using a Novel Asynchronous Pipeline Architecture
- May 28-31. Geneva. Switzerland
- Tin-Yau Tang. Chiu-Sing Choy. Jan Butas and Cheong-Fat Chan. "An ALU design using a Novel Asynchronous Pipeline Architecture". ISCAS 2000-IEEE International Symposium on Circuits and Systems. May 28-31 2000. Geneva. Switzerland
- (2000) ISCAS 2000-IEEE International Symposium on Circuits and Systems
- Tang, T.¹ Choy, C.² Butas, J.³ Chan, C.⁴

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.