On the Safe Operating Area of Power Schottky Diodes in avalanche conditions

Proceedings of the International Symposium on Power Semiconductor Devices and ICs

Volumn , Issue , 2005, Pages 223-226

  Irace, A ^a   Breglio, G ^a   Spirito, P ^a   Bricconi, A ^b   Raffo, D ^b   Merlin, L ^b  

^a UNIVERSITY OF NAPLES FEDERICO II   (Italy)

^b International Rectifier Corporation Italiana   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ATLAS SIMULATIONS; DEVICE FAILURES; POWER SCHOTTKY DIODES; SAFE OPERATING AREA (SOA);

AVALANCHE DIODES; COMPUTER SIMULATION; FAILURE (MECHANICAL);

SCHOTTKY BARRIER DIODES;

EID: 27744486943     PISSN: 10636854     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. B.J. Baliga, "Analysis of a High Voltage Merged P-I-N/Schottky (MPS) Rectifier", IEEE Electron Device Letters, vol. EDL-08, 407-409, (1987)
2. T. Misawa, "Negative resistance in p-n junctions under avalanche breakdown conditions, Part I", IEEE Trans. Electron Devices, vol ED-13, 137-143, (1966)
3. G. Breglio and P. Spirito, "Experimental detection of time dependent temperature maps in power bipolar transistors", Microelectronics-Journal, 31(9-10), 735-739, (2000)
4. E. D'Arcangelo, A. Irace, G. Breglio and P. Spirito, "Experimental characterization of temperature distribution on Power MOS devices during Unclamped Inductive Switching", Microelectronics Reliability, 44, 1455-1459 (2004)