A 1.4V 5GHz four-antenna cartesian-combining receiver in 90nm CMOS for beamforming and spatial diversity applications

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 48, Issue , 2005, Pages

  Paramesh, Jeyanandh ^a,b   Bishop, Ralph ^a   Soumyanath, K ^a   Allstot, David ^b  

^a INTEL CORPORATION   (United States)

^b UNIVERSITY OF WASHINGTON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 27644473987     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. H. Hashemi et al., "A Fully Integrated 24GHz 8-Path Phased-Array Receiver in Silicon," ISSCC Dig. Tech. Papers, pp. 390-391, Feb., 2004.
2. H. Zarei and D.J. Allstot, "A Low-Loss Phase-Shifter in 180nm CMOS for Multiple-Antenna Receivers," ISSCC Dig. Tech. Papers, pp. 392-393, Feb., 2004.
3. 2 6-T SRAM Cell," IEDM Dig. Tech. Papers, pp. 73-76, Dec., 2002.