A new approach for on-line placement on reconfigurable devices

Proceedings - International Parallel and Distributed Processing Symposium, IPDPS 2004 (Abstracts and CD-ROM)

Volumn 18, Issue , 2004, Pages 1825-1831

  Ahmadinia, Ali ^a   Bobda, Christophe ^a   Bednara, Marcus ^a   Teich, Jürgen ^a  

^a UNIVERSITY OF ERLANGEN NUREMBERG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COSTS; MATHEMATICAL MODELS; MULTITASKING; PROBLEM SOLVING; RESOURCE ALLOCATION; ROUTERS; SCHEDULING;

PROCESSING ELEMENTS (PE); RECONFIGURABLE DEVICES; SCHEDULERS; SPACE MANAGERS;

COMPUTER SCIENCE;

EID: 12444285805     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. K. Bazargan, R. Kastner, and M. Sarrafzadeh. Fast Template Placement for Reconfigurable Computing Systems. In IEEE Design and Test of Computers, volume17, pages 68-83, 2000.
2. A. Ahmadinia, and J. Teich. Speeding up Online Placement for XILINX FPGAs by Reducing Configuration Overhead. To appear in Proceedings of 12th IFIP VLSI-SOC, December 2003.
3. H. Walder, C. Steiger, and M. Platzner. Fast Online Task Placement on FPGAs: Free Space Partitioning and 2-D Hashing. In Proceedings of Reconfigurable Architectures Workshop (RAW). IEEE-CS Press, April 2003.
4. Grant Wigley, and David Kearney, Research Issues in Operating Systems for Reconfigurable Computing, In Proceedings of the 2nd International Conference on Engineering of Reconfigurable Systems and Architectures (ERSA). CSREA Press, June 2002.
5. Oliver Diessel and Hossam ElGindy, On scheduling dynamic FPGA reconfigurations, In Kenneth A Hawick and Heath A James, eds, Proceedings of Australasian Conference on Parallel and Real-Time Systems (PART), pp. 191-200, 1998, Springer-Verlag.
6. Sándor Fekete, Ekkehard Köhler, and Jürgen Teich, Optimal FPGA Module Placement with Temporal Precedence Constraints, In Proc. of Design Automation and Test in Europe , IEEE-CS Press, 2001, pp. 658-665.