Buffer-trapping effects on drain lag and power compression in GaN FET

Physica Status Solidi C: Conferences

Volumn 2, Issue 7, 2005, Pages 2635-2638

  Horio, K ^a   Yonemoto, K ^a  

^a SHIBAURA INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC POTENTIAL; ELECTRON TRAPS; GALLIUM NITRIDE;

BUFFER-TRAPPING EFFECTS; DRAIN CURRENT; TWO-DIMENSIONAL TRANSIENT SIMULATION;

FIELD EFFECT TRANSISTORS;

EID: 27344434560     PISSN: 16101634     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1002/pssc.200461311     Document Type: Conference Paper

References (5)

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3. W. Kruppa, S. C. Binari, and K. Doverspike, Low-frequency dispersion characteristics of GaN HFETs, Electron. Lett. 31, 1951 (1995).
4. H. Morkoc, Nitride Semiconductors and Devices (Springer-Verlag, 1999).
5. K. Horio and Y. Fuseya, Two-dimensional simulations of drain-current transients in GaAs MESFET's with semi-insulating substrates compensated by deep levels, IEEE Trans. Electron Devices 41, 1340 (1994).