Single-chip eye tracker using smart CMOS image sensor pixels

Analog Integrated Circuits and Signal Processing

Volumn 45, Issue 2, 2005, Pages 131-141

  Kim, Dongsoo ^a   Lim, Seunghyun ^a   Han, Gunhee ^a  

^a Yonsei University   (South Korea)

Author keywords

CMOS image sensor (CIS); Eye tracker; Shrink operation; Smart CIS; Winner take all (WTA)

Indexed keywords

CAMERAS; CHARGE COUPLED DEVICES; COMPUTER SOFTWARE; ERROR ANALYSIS; IMAGE SENSORS;

CMOS IMAGE SENSORS (CIS); EYE TRACKERS; IMAGE SENSOR PIXELS;

CMOS INTEGRATED CIRCUITS;

EID: 25444432270     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1007/s10470-005-4006-7     Document Type: Article

References (17)

1. T. Miyoshi and A. Murata, "Input device using eye tracker in human-computer interaction," in Proc. 10th IEEE Int. Workshop Robot and Human Interactive Communication, Sept. 2001, pp. 18-21.
2. G. Beach, C.J. Cohen, J. Braun, and G. Moody, "Eye tracker system tor use with head mounted displays," in IEEE Int. Conf. Systems, Man, and Cybernetics, vol. 5, pp. 4348-4352, Oct. 1998.
3. K. Iwamoto, S. Katsumata, and K. Tanie, "An eye movement tracking type head mounted display for virtual reality system: evaluation experiments of aprototype system," in IEEE Int. Conf. Systems, Man, and Cybernetics, vol. 1, pp. 13-18, Oct. 1994.
4. Z. Zhiwei, J. Qiang, K. Fujimura, and L. Kuangchih, "Combining Kalman filtering and mean shift for real time eye tracking under active IR illumination," in Proc. 16th Int. Conf. Pattern Recognition, vol. 4, 2002, pp. 318-321.
5. T. Oya, H. Hashimoto, and F. Harashima, "Active eye sensing system-predictive filtering for visual tracking," in Proc. Int. Conf. Industrial Electronics, Control, and Instrumentation, vol. 3, Nov. 1993, pp. 1718-1723.
6. A. Graupner, J. Schreiter, S. Getzlaff, and R. Schüffny, "CMOS image sensor with mixed-signal processor array," IEEE J. Solid-State Circuits, vol. 38, pp. 948-957, 2003.
7. Y. Muramatsu, S. Kurosawa, M. Furamiya, H. Ohkubo, and Y. Nakashiba, "A signal-processing CMOS image sensor using a simple analog operation," IEEE J. Solid-State Circuits, vol. 38, pp. 101-106, 2003.
8. M. Schanz, W. Brochherde, R. Hauschild, B. J. Hosticka, and M. Schwarz, "Smart CMOS image sensor arrays," IEEE Trans. Electron Devices, vol. 44, pp. 1699-1705, Oct. 1997.
9. Y. Ni and J. Guan, "A 256 × 256 pixel smart CMOS image sensor for line-based stereo vision applications," IEEE J. Solid-State Circuits, vol. 35, pp. 1055-1061, 2000.
10. S. Espejo, A. Rodríguez-Vázquez, R. Domínguez- Castro, J. L. Huertas, and E. Sánchez-Sinencio, "Smart-pixel cellular neural networks in analog current-mode CMOS technology," IEEE J. Solid-State Circuits, vol. 29, pp. 895-905, 1994.
11. M. Schwarz, R. Hauschild, B. J. Hosticka, J. Huppertz, T. Kneip, S. Kolnsberg, L. Ewe, and H. K. Trieu, "Single-chip CMOS image sensors for a retina implant system," IEEE Trans. Circuits Syst. vol. 46, pp. 870-877, 1999.
12. L. O. Chua and L. Yang, "Cellular neural networks: theory," IEEE Trans. Circuits Syst., vol. 35, pp. 1257-1272, 1988.
13. L. O. Chua and L. Yang, "Cellular neural networks: applications," IEEE Trans. Circuits Syst., vol. 35, pp. 1273-1290, 1988.
14. A. Fish, D. Turchin, and O. Yadid-Pecht, "An APS with 2-D winner-take-all selection employing adaptive spatial filtering and false alarm reduction," IEEE Trans. electron Devices, vol. 50, pp. 159-165, 2003.
15. T. Serrano-Gotarredona and B. Linares-Barranco, "A high-precision current-mode WTA-MAX circuit with multichip capability," IEEE J. Solid-State Circuits, vol. 33, pp. 280-286, 1998.
16. I. E. Opris, "Analog rank extractors," IEEE Trans. Circuits Syst., vol. 44, no. 12, pp. 1114-1121, 1997.
17. J. Choi and B. J. Sheu, "A high-precision VLSI winner-take-all circuit for self-organizing neural networks," IEEE J. Solid-State Circuits, vol. 28, no. 5, pp. 576-584, 1993.