-
1
-
-
0004307488
-
APS image sensors with a winner-take-all (WTA) mode of operation
-
JPL/Caltech New Technology Rep. NPO 20 212
-
O. Yadid-Pecht, E. R. Fossum, and C. Mead, "APS Image Sensors With a Winner-Take-All (WTA) Mode of Operation,", JPL/Caltech New Technology Rep. NPO 20 212.
-
-
-
Yadid-Pecht, O.1
Fossum, E.R.2
Mead, C.3
-
2
-
-
0030703485
-
CMOS winner-take-all circuits: A detail comparison
-
Z. S. Gunay, and E. Sanches-Sinencio, "CMOS winner-take-all circuits: A detail comparison," in Proc. ISCAS'97, Hong Kong, June 9-12, 1997, pp. 41-44.
-
Proc. ISCAS'97, Hong Kong, June 9-12, 1997
, pp. 41-44
-
-
Gunay, Z.S.1
Sanches-Sinencio, E.2
-
3
-
-
0001031001
-
-
D. S. Touretzky, Ed. San Mateo, CA: Morgan Kaumann
-
J. Lazzaro, S. Ryckebusch, M. A. Mahowald, and C. A. Mead, Winner-Tale-All Networks of O(n) Complexity, D. S. Touretzky, Ed. San Mateo, CA: Morgan Kaumann, 1989, vol. 1, pp. 703-711.
-
(1989)
Winner-Tale-All Networks of O(n) Complexity
, vol.1
, pp. 703-711
-
-
Lazzaro, J.1
Ryckebusch, S.2
Mahowald, M.A.3
Mead, C.A.4
-
4
-
-
0027597003
-
CMOS current mode winner-take-all circuit with both excitatory and inhibitory feedback
-
May
-
J. A. Startzyk and X. Fang, "CMOS current mode winner-take-all circuit with both excitatory and inhibitory feedback," Electron. Lett., vol. 29, no. 10, May 1993.
-
(1993)
Electron. Lett.
, vol.29
, Issue.10
-
-
Startzyk, J.A.1
Fang, X.2
-
5
-
-
0029328176
-
CMOS current mode winner-take-all circuit with distributed hysteresis
-
June
-
S. P. DeWeerth and T. G. Morris, "CMOS current mode winner-take-all circuit with distributed hysteresis," Electron. Lett., vol. 31, no. 13, June 1995.
-
(1995)
Electron. Lett.
, vol.31
, Issue.13
-
-
DeWeerth, S.P.1
Morris, T.G.2
-
6
-
-
0029708435
-
Winning isn't everything
-
D. M. Wilson and S. P. DeWeerth, "Winning isn't everything," in Proc. ISCAS'95, Seattle, WA, 1995, pp. 105-108.
-
Proc. ISCAS'95, Seattle, WA, 1995
, pp. 105-108
-
-
Wilson, D.M.1
DeWeerth, S.P.2
-
7
-
-
0032669256
-
Semi-parallel rank-order filtering in analog VLSI
-
Piscataway, NJ
-
R. Kalim and D. M. Wilson, "Semi-parallel rank-order filtering in analog VLSI," in Proc. ISCAS'99, vol. 2, Piscataway, NJ, 1999, pp. 232-235.
-
(1999)
Proc. ISCAS'99
, vol.2
, pp. 232-235
-
-
Kalim, R.1
Wilson, D.M.2
-
8
-
-
84962130113
-
Design of complementary low-power CMOS architectures for looser-take-all and winner-take-all
-
Los Alamitos, CA
-
N. Donckers, C. Dualibe, and M. Verleysen, "Design of complementary low-power CMOS architectures for looser-take-all and winner-take-all," in Proc. 7th Int. Conf. Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, vol. xv+426, Los Alamitos, CA, 1999, pp. P360-P365.
-
(1999)
Proc. 7th Int. Conf. Microelectronics for Neural, Fuzzy and Bio-Inspired Systems
, vol.426
-
-
Donckers, N.1
Dualibe, C.2
Verleysen, M.3
-
10
-
-
0029710564
-
Asynchronous sampling of 2D arrays using winner-takes-all arbitration
-
Z. Kalayjian, J. Waskiewicz, D. Yochelson, and A. G. Andreou, "Asynchronous sampling of 2D arrays using winner-takes-all arbitration," in Proc. ISCAS 96, vol. 3, 1996, pp. 393-396.
-
(1996)
Proc. ISCAS 96
, vol.3
, pp. 393-396
-
-
Kalayjian, Z.1
Waskiewicz, J.2
Yochelson, D.3
Andreou, A.G.4
-
11
-
-
0030379706
-
Analog VLSI circuits for sensory attentive processing
-
T. G. Moris, C. S. Wilson, and S. P. DeWeerth, "Analog VLSI circuits for sensory attentive processing," in Proc. IEEE Int. Conf. Multisensor Fusion and Integration for Intelligent Systems, 1996, pp. 395-402.
-
Proc. IEEE Int. Conf. Multisensor Fusion and Integration for Intelligent Systems, 1996
, pp. 395-402
-
-
Moris, T.G.1
Wilson, C.S.2
DeWeerth, S.P.3
-
12
-
-
0032279319
-
Object-based selection within an analog visual attention system
-
Dec.
-
T. G. Morris, T. K. Horiuchi, and P. DeWeerth, "Object-based selection within an analog visual attention system," IEEE Trans. Circuits Syst. II, vol. 45, pp. 1564-1572, Dec. 1998.
-
(1998)
IEEE Trans. Circuits Syst. II
, vol.45
, pp. 1564-1572
-
-
Morris, T.G.1
Horiuchi, T.K.2
DeWeerth, P.3
-
13
-
-
0035011628
-
CMOS current/voltage mode winner-take-all circuit with spatial filtering
-
Sydney, Australia, May
-
A. Fish and O. Yadid-Pecht, "CMOS current/voltage mode winner-take-all circuit with spatial filtering," in Proc. ISCAS'01, vol. 2, Sydney, Australia, May 2001, pp. 636-639.
-
(2001)
Proc. ISCAS'01
, vol.2
, pp. 636-639
-
-
Fish, A.1
Yadid-Pecht, O.2
|