A single-flux-quantum logic prototype microprocessor

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 47, Issue , 2004, Pages

  Tanaka, Masamitsu ^a   Matsuzaki, Futabako ^b   Kondo, Toshiaki ^a   Nakajima, Naoki ^b   Yamanashi, Yuki ^b   Fujimaki, Akira ^a   Hayakawa, Hisao ^a   Yoshikawa, Nobuyuki ^b   Terai, Hirotaka ^c   Yorozu, Shinichi ^d  

^a NAGOYA UNIVERSITY   (Japan)

^b YOKOHAMA NATIONAL UNIVERSITY   (Japan)

^c NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY   (Japan)

^d SUPERCONDUCTIVITY RESEARCH LABORATORY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

HIGH THROUGHPUT LOGIC GATES; IMPULSE; PROTOTYPE; SINGLE-FLUX QUANTUM LOGIC;

DATA ACQUISITION; DECODING; DIGITAL CIRCUITS; ELECTRIC POTENTIAL; FREQUENCY AGILITY; JOSEPHSON JUNCTION DEVICES; LSI CIRCUITS; PULSE WIDTH MODULATION; QUANTUM THEORY; SIGNAL PROCESSING; SOFTWARE PROTOTYPING; SUPERCONDUCTING DEVICES; UNINTERRUPTIBLE POWER SYSTEMS;

MICROPROCESSOR CHIPS;

EID: 2542499855     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. K. K. Likharev and V. K. Semenov, "RSFQ Logic/Memory Family: A New Josephson-Junction Technology for Sub-Terahertz-Clook-Prequency Digital Systems," IEEE Trans. Appl. Supercond., vol. 1, pp. 3-28, Mar. 1991.
2. M. Dorojevets, P. Bunyk and D. Zinoviev, "FLUX Chip: Design of a 20-GHz 16-bit Ultrapipelined RSFQ Processor Prototype Based on 1.75-mm LTS Technology," IEEE Trans. Appl. Supercond., vol. 11, pp. 326-332, Mar. 2001.
3. N. Yoshikawa et al., "Design and Component Test of a Tiny Processor Based on the SFQ Technology," IEEE Trans. Appl. Supercond., vol. 13, pp. 441-445, Jun. 2003.
4. A. Fujimaki, Y. Takai and N. Yoshikawa, "High-End Server Based on Complexity-Reduced Architecture for Superconductor Technology," IEICE Trans. Electron., vol. E85-C, pp. 612-616, Mar. 2002.
5. S. Yorozu et al., "A Single Flux Quantum Standard Logic Cell Library," Physica C, vol. 378-381, pp. 1471-1474, Oct. 2002.
6. S. Nagasawa et al., "A 380 ps, 9.5 mW Josephson 4-Kbit RAM Operated at a High Bit Yield," IEEE Trans. Appl Supercond., vol. 5, pp. 2447-2452, Jun. 1995.
7. E. S. Fang and T. Van Duzer, "A Josephson Integrated Circuit Simulator (JSIM) for Superconductive Electronics Appliction," Extend Abstract 1989 International Superconductive Electronics Conference, Japan, pp. 407-410 Jun. 1989.