Linked faults in random access memories: Concept, fault models, test algorithms, and industrial results

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 23, Issue 5, 2004, Pages 737-757

  Hamdioui, Said ^a,b   Al Ars, Zaid ^b   Van De Goor, Ad J ^b   Rodgers, Mike ^a  

^a INTEL CORPORATION   (United States)

^b DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

Fault coverage; Functional fault models (FFMs); Linked faults (LFs); March tests; Memory testing

Indexed keywords

COMPUTER SIMULATION; DATA REDUCTION; MASKS; OPTIMIZATION; ULSI CIRCUITS;

FAULT COVERAGE; FUNCTIONAL FAULT MODELS (FFM); LINKED FAULTS (LF); MARCH TESTS; MEMORY TESTING;

RANDOM ACCESS STORAGE;

EID: 2542437881     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.826578     Document Type: Article

References (22)

1. M. S. Abadir and J. K. Reghbati, "Functional testing of semiconductor random access memories," ACM Comput. Surveys, vol. 15, no. 3, pp. 175-198, 1983.
2. R. D. Adams and E. S.Cooley, "Analysis of a deceptive read destructive memory fault model and recommended testing," in Proc. IEEE North Atlantic Test Workshop, 1996, pp. 27-32.
3. Z. Al-Ars and A. J. van de Goor, "Impact of memory cell array bridges on the faulty behavior in embedded drams," in Proc. ofAsian Test Symp., 2000. pp. 282-289.
4. _, "Static and dynamic behavior of memory cell array opens and shorts in embedded DRAMs," in Proc. Design Automation Test Eur., 2001. pp. 496-503.
5. M. A. Breuder and A. D. Friedman, Diagnosis and Reliable Design of Digital Systems. Woodland Hills, CA, USA: Computer Science, 1976.
6. R. Dekker, F. Beenaker, and L. Thijssen, "A realistic fault model and test algorithm for static random access memories," IEEE Trans. Computer-Aided Design, vol. 9, pp. 567-572, June 1990.
7. S. Hamdioui and A. J. van de Goor, "Experimental analysis of spot defects in SRAMs: Realistic fault models and tests," in Proc. 9th Asian Test Symp., 2000, pp. 131-138.
8. _, "Efficient tests for realistic faults in dual-port SRAMs," IEEE Trans. Comput., vol. 51, pp. 460-473, May 2002.
9. S. Hamdioui, "RAM-LFs-Testing Research Project," Delft Univ. Technol., Comput. Eng. Lab. Tech. Rep., Delft, The Netherlands, 2002.
10. S. Hamdioui, Z. Al-Ars, and A. J. van de Goor, "Testing static and dynamic faults in random access memories," in Proc. VLSI Test Symp., 2002, pp. 395-400.
11. V. K. Kim and T. Chen, "On comparing functional fault coverage and defect coverage for memory testing," IEEE Trans. Computer-Aided Design, vol. 18, pp. 1676-1683, Nov. 1999.
12. M. Marinescu, "Simple and efficient algorithms for functional RAM testing," in Proc. IEEE Int. Test Conf., 1982, pp. 236-239.
13. M. Nicolaidis, A. C. Alves, and H. Bederr, "Testing complex coupling faults in multiport memories," IEEE Trans. on VLSI Systems, vol. 3, no. 1, pp. 59-71, Mar. 1995.
14. R. Nair, "Efficient test algorithms for testing semiconductor random access memories." IEEE Trans. Comput., vol. C-28, pp. 572-567, Mar. 1978.
15. C. A. Papachristou and N. B. Saghal, "An improved method for detecting functional faults in random access memories," IEEE Trans. Comput., vol. C34, pp. 110-116, Mar. 1985.
16. The National Roadmap for Semiconductors, 2000. Semiconductor Industry Association.
17. D. S. Suk and S. M. Reddy, "A march test for functional faults in semi-conductor random access memories," IEEE Trans. Comput., vol. C30. pp. 982-985, Dec. 1981.
18. A. J. van de Goor and Z. Al-Ars, "Functional fault models: A formal notation and taxonomy," in Proc. IEEE VLSI Test Symp., 2000, pp. 281-289.
19. A. J. van de Goor el al., "March LA: A test for linked memory faults," in Proc. Eur. Design Test Conf., 1999, p. 627.
20. A. J. van de Goor and A. Paalvast, "Industrial evaluation of DRAM SIMM tests," in Proc. IEEE Int. Test Conf., 2000, pp. 426-435.
21. A. J. van de Goor et al., "March LR: A test for realistic linked faults," in Proc. IEEE VLSI Test Symp., 1996, pp. 272-280.
22. _, Testing Semiconductor Memories, Theory, and Practice. Gouda, The Netherlands: ComTex, 1998.