Inspection of integrated circuit databases through reticle and wafer simulation: An integrated approach to Design for Manufacturing (DFM)

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 5756, Issue , 2005, Pages 61-72

  Howard, William ^a,d   Azpiroz, Jaione Tirapu ^b   Xiong, Yalin ^c   Mack, Chris ^a   Verma, Gaurav ^c   Volk, William ^c   Lehon, Harold ^c   Deng, Yunfei ^c   Shi, Rui Fang ^c   Culp, James ^b   Mansfield, Scott ^b  

^a KLA Tencor Austin   (United States)

^b IBM MICROELECTRONICS   (United States)

^c KLA TENCOR CORPORATION   (United States)

^d NONE   (United States)

Author keywords

DesignScan; DFM; Process window; PROLITH; Simulation

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; DATA REDUCTION; DATABASE SYSTEMS; INTEGRATED CIRCUITS; OPTICAL RESOLVING POWER;

DESIGNSCAN; OPTICAL PROXIMITY CORRECTION (OPC); PROCESS WINDOW; PROLITH;

OPTICAL SYSTEMS;

EID: 25144512933     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.604698     Document Type: Conference Paper

References (4)

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3. L. Peters, "Demystifying Design-for-Yield," Semiconductor International, July 1, 2004.
4. S. Jug, R. Huang, J.D. Byers, and C.A. Mack, "Automatic Calibration of Lithography Simulation Parameters," Lithography for Semiconductor Manufacturing II, Proc., SPIE 4404, pp. 380-395, 2001.